1 | /* Save and restore call-clobbered registers which are live across a call. |
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2 | Copyright (C) 1989, 1992, 1994, 1995 Free Software Foundation, Inc. |
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3 | |
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4 | This file is part of GNU CC. |
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5 | |
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6 | GNU CC is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 2, or (at your option) |
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9 | any later version. |
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10 | |
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11 | GNU CC is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |
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16 | You should have received a copy of the GNU General Public License |
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17 | along with GNU CC; see the file COPYING. If not, write to |
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18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
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19 | Boston, MA 02111-1307, USA. */ |
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20 | |
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21 | #include "config.h" |
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22 | #include "rtl.h" |
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23 | #include "insn-config.h" |
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24 | #include "flags.h" |
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25 | #include "regs.h" |
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26 | #include "hard-reg-set.h" |
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27 | #include "recog.h" |
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28 | #include "basic-block.h" |
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29 | #include "reload.h" |
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30 | #include "expr.h" |
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31 | |
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32 | #ifndef MAX_MOVE_MAX |
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33 | #define MAX_MOVE_MAX MOVE_MAX |
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34 | #endif |
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35 | |
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36 | #ifndef MIN_UNITS_PER_WORD |
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37 | #define MIN_UNITS_PER_WORD UNITS_PER_WORD |
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38 | #endif |
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39 | |
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40 | /* Modes for each hard register that we can save. The smallest mode is wide |
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41 | enough to save the entire contents of the register. When saving the |
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42 | register because it is live we first try to save in multi-register modes. |
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43 | If that is not possible the save is done one register at a time. */ |
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44 | |
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45 | static enum machine_mode |
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46 | regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
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47 | |
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48 | /* For each hard register, a place on the stack where it can be saved, |
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49 | if needed. */ |
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50 | |
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51 | static rtx |
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52 | regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
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53 | |
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54 | /* We will only make a register eligible for caller-save if it can be |
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55 | saved in its widest mode with a simple SET insn as long as the memory |
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56 | address is valid. We record the INSN_CODE is those insns here since |
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57 | when we emit them, the addresses might not be valid, so they might not |
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58 | be recognized. */ |
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59 | |
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60 | static enum insn_code |
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61 | reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
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62 | static enum insn_code |
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63 | reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
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64 | |
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65 | /* Set of hard regs currently live (during scan of all insns). */ |
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66 | |
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67 | static HARD_REG_SET hard_regs_live; |
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68 | |
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69 | /* Set of hard regs currently residing in save area (during insn scan). */ |
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70 | |
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71 | static HARD_REG_SET hard_regs_saved; |
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72 | |
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73 | /* Set of hard regs which need to be restored before referenced. */ |
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74 | |
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75 | static HARD_REG_SET hard_regs_need_restore; |
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76 | |
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77 | /* Number of registers currently in hard_regs_saved. */ |
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78 | |
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79 | int n_regs_saved; |
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80 | |
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81 | static void set_reg_live PROTO((rtx, rtx)); |
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82 | static void clear_reg_live PROTO((rtx)); |
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83 | static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode)); |
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84 | static int insert_save_restore PROTO((rtx, int, int, |
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85 | enum machine_mode, int)); |
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86 | |
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87 | /* Initialize for caller-save. |
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88 | |
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89 | Look at all the hard registers that are used by a call and for which |
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90 | regclass.c has not already excluded from being used across a call. |
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91 | |
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92 | Ensure that we can find a mode to save the register and that there is a |
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93 | simple insn to save and restore the register. This latter check avoids |
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94 | problems that would occur if we tried to save the MQ register of some |
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95 | machines directly into memory. */ |
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96 | |
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97 | void |
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98 | init_caller_save () |
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99 | { |
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100 | char *first_obj = (char *) oballoc (0); |
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101 | rtx addr_reg; |
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102 | int offset; |
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103 | rtx address; |
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104 | int i, j; |
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105 | |
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106 | /* First find all the registers that we need to deal with and all |
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107 | the modes that they can have. If we can't find a mode to use, |
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108 | we can't have the register live over calls. */ |
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109 | |
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110 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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111 | { |
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112 | if (call_used_regs[i] && ! call_fixed_regs[i]) |
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113 | { |
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114 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
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115 | { |
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116 | regno_save_mode[i][j] = choose_hard_reg_mode (i, j); |
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117 | if (regno_save_mode[i][j] == VOIDmode && j == 1) |
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118 | { |
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119 | call_fixed_regs[i] = 1; |
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120 | SET_HARD_REG_BIT (call_fixed_reg_set, i); |
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121 | } |
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122 | } |
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123 | } |
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124 | else |
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125 | regno_save_mode[i][1] = VOIDmode; |
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126 | } |
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127 | |
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128 | /* The following code tries to approximate the conditions under which |
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129 | we can easily save and restore a register without scratch registers or |
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130 | other complexities. It will usually work, except under conditions where |
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131 | the validity of an insn operand is dependent on the address offset. |
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132 | No such cases are currently known. |
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133 | |
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134 | We first find a typical offset from some BASE_REG_CLASS register. |
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135 | This address is chosen by finding the first register in the class |
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136 | and by finding the smallest power of two that is a valid offset from |
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137 | that register in every mode we will use to save registers. */ |
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138 | |
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139 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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140 | if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) |
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141 | break; |
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142 | |
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143 | if (i == FIRST_PSEUDO_REGISTER) |
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144 | abort (); |
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145 | |
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146 | addr_reg = gen_rtx (REG, Pmode, i); |
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147 | |
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148 | for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) |
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149 | { |
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150 | address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset)); |
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151 | |
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152 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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153 | if (regno_save_mode[i][1] != VOIDmode |
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154 | && ! strict_memory_address_p (regno_save_mode[i][1], address)) |
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155 | break; |
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156 | |
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157 | if (i == FIRST_PSEUDO_REGISTER) |
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158 | break; |
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159 | } |
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160 | |
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161 | /* If we didn't find a valid address, we must use register indirect. */ |
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162 | if (offset == 0) |
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163 | address = addr_reg; |
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164 | |
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165 | /* Next we try to form an insn to save and restore the register. We |
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166 | see if such an insn is recognized and meets its constraints. */ |
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167 | |
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168 | start_sequence (); |
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169 | |
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170 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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171 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
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172 | if (regno_save_mode[i][j] != VOIDmode) |
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173 | { |
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174 | rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address); |
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175 | rtx reg = gen_rtx (REG, regno_save_mode[i][j], i); |
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176 | rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); |
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177 | rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); |
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178 | rtx saveinsn = emit_insn (savepat); |
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179 | rtx restinsn = emit_insn (restpat); |
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180 | int ok; |
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181 | |
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182 | reg_save_code[i][j] = recog_memoized (saveinsn); |
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183 | reg_restore_code[i][j] = recog_memoized (restinsn); |
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184 | |
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185 | /* Now extract both insns and see if we can meet their constraints. */ |
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186 | ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1); |
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187 | if (ok) |
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188 | { |
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189 | insn_extract (saveinsn); |
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190 | ok = constrain_operands (reg_save_code[i][j], 1); |
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191 | insn_extract (restinsn); |
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192 | ok &= constrain_operands (reg_restore_code[i][j], 1); |
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193 | } |
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194 | |
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195 | if (! ok) |
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196 | { |
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197 | regno_save_mode[i][j] = VOIDmode; |
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198 | if (j == 1) |
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199 | { |
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200 | call_fixed_regs[i] = 1; |
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201 | SET_HARD_REG_BIT (call_fixed_reg_set, i); |
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202 | } |
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203 | } |
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204 | } |
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205 | |
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206 | end_sequence (); |
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207 | |
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208 | obfree (first_obj); |
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209 | } |
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210 | |
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211 | /* Initialize save areas by showing that we haven't allocated any yet. */ |
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212 | |
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213 | void |
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214 | init_save_areas () |
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215 | { |
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216 | int i, j; |
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217 | |
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218 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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219 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
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220 | regno_save_mem[i][j] = 0; |
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221 | } |
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222 | |
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223 | /* Allocate save areas for any hard registers that might need saving. |
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224 | We take a conservative approach here and look for call-clobbered hard |
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225 | registers that are assigned to pseudos that cross calls. This may |
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226 | overestimate slightly (especially if some of these registers are later |
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227 | used as spill registers), but it should not be significant. |
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228 | |
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229 | Then perform register elimination in the addresses of the save area |
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230 | locations; return 1 if all eliminated addresses are strictly valid. |
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231 | We assume that our caller has set up the elimination table to the |
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232 | worst (largest) possible offsets. |
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233 | |
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234 | Set *PCHANGED to 1 if we had to allocate some memory for the save area. |
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235 | |
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236 | Future work: |
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237 | |
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238 | In the fallback case we should iterate backwards across all possible |
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239 | modes for the save, choosing the largest available one instead of |
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240 | falling back to the smallest mode immediately. (eg TF -> DF -> SF). |
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241 | |
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242 | We do not try to use "move multiple" instructions that exist |
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243 | on some machines (such as the 68k moveml). It could be a win to try |
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244 | and use them when possible. The hard part is doing it in a way that is |
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245 | machine independent since they might be saving non-consecutive |
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246 | registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ |
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247 | |
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248 | int |
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249 | setup_save_areas (pchanged) |
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250 | int *pchanged; |
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251 | { |
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252 | int i, j, k; |
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253 | HARD_REG_SET hard_regs_used; |
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254 | int ok = 1; |
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255 | |
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256 | |
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257 | /* Allocate space in the save area for the largest multi-register |
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258 | pseudos first, then work backwards to single register |
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259 | pseudos. */ |
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260 | |
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261 | /* Find and record all call-used hard-registers in this function. */ |
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262 | CLEAR_HARD_REG_SET (hard_regs_used); |
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263 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
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264 | if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) |
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265 | { |
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266 | int regno = reg_renumber[i]; |
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267 | int endregno |
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268 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); |
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269 | int nregs = endregno - regno; |
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270 | |
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271 | for (j = 0; j < nregs; j++) |
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272 | { |
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273 | if (call_used_regs[regno+j]) |
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274 | SET_HARD_REG_BIT (hard_regs_used, regno+j); |
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275 | } |
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276 | } |
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277 | |
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278 | /* Now run through all the call-used hard-registers and allocate |
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279 | space for them in the caller-save area. Try to allocate space |
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280 | in a manner which allows multi-register saves/restores to be done. */ |
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281 | |
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282 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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283 | for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--) |
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284 | { |
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285 | int ok = 1; |
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286 | int do_save; |
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287 | |
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288 | /* If no mode exists for this size, try another. Also break out |
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289 | if we have already saved this hard register. */ |
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290 | if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) |
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291 | continue; |
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292 | |
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293 | /* See if any register in this group has been saved. */ |
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294 | do_save = 1; |
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295 | for (k = 0; k < j; k++) |
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296 | if (regno_save_mem[i + k][1]) |
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297 | { |
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298 | do_save = 0; |
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299 | break; |
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300 | } |
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301 | if (! do_save) |
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302 | continue; |
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303 | |
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304 | for (k = 0; k < j; k++) |
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305 | { |
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306 | int regno = i + k; |
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307 | ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0); |
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308 | } |
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309 | |
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310 | /* We have found an acceptable mode to store in. */ |
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311 | if (ok) |
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312 | { |
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313 | |
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314 | regno_save_mem[i][j] |
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315 | = assign_stack_local (regno_save_mode[i][j], |
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316 | GET_MODE_SIZE (regno_save_mode[i][j]), 0); |
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317 | |
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318 | /* Setup single word save area just in case... */ |
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319 | for (k = 0; k < j; k++) |
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320 | { |
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321 | /* This should not depend on WORDS_BIG_ENDIAN. |
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322 | The order of words in regs is the same as in memory. */ |
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323 | rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], |
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324 | XEXP (regno_save_mem[i][j], 0)); |
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325 | |
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326 | regno_save_mem[i+k][1] |
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327 | = adj_offsettable_operand (temp, k * UNITS_PER_WORD); |
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328 | } |
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329 | *pchanged = 1; |
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330 | } |
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331 | } |
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332 | |
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333 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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334 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
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335 | if (regno_save_mem[i][j] != 0) |
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336 | ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]), |
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337 | XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0)); |
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338 | |
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339 | return ok; |
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340 | } |
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341 | |
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342 | /* Find the places where hard regs are live across calls and save them. |
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343 | |
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344 | INSN_MODE is the mode to assign to any insns that we add. This is used |
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345 | by reload to determine whether or not reloads or register eliminations |
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346 | need be done on these insns. */ |
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347 | |
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348 | void |
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349 | save_call_clobbered_regs (insn_mode) |
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350 | enum machine_mode insn_mode; |
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351 | { |
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352 | rtx insn; |
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353 | int b; |
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354 | |
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355 | for (b = 0; b < n_basic_blocks; b++) |
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356 | { |
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357 | regset regs_live = basic_block_live_at_start[b]; |
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358 | rtx prev_block_last = PREV_INSN (basic_block_head[b]); |
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359 | REGSET_ELT_TYPE bit; |
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360 | int offset, i, j; |
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361 | int regno; |
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362 | |
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363 | /* Compute hard regs live at start of block -- this is the |
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364 | real hard regs marked live, plus live pseudo regs that |
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365 | have been renumbered to hard regs. No registers have yet been |
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366 | saved because we restore all of them before the end of the basic |
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367 | block. */ |
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368 | |
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369 | #ifdef HARD_REG_SET |
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370 | hard_regs_live = *regs_live; |
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371 | #else |
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372 | COPY_HARD_REG_SET (hard_regs_live, regs_live); |
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373 | #endif |
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374 | |
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375 | CLEAR_HARD_REG_SET (hard_regs_saved); |
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376 | CLEAR_HARD_REG_SET (hard_regs_need_restore); |
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377 | n_regs_saved = 0; |
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378 | |
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379 | for (offset = 0, i = 0; offset < regset_size; offset++) |
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380 | { |
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381 | if (regs_live[offset] == 0) |
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382 | i += REGSET_ELT_BITS; |
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383 | else |
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384 | for (bit = 1; bit && i < max_regno; bit <<= 1, i++) |
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385 | if ((regs_live[offset] & bit) |
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386 | && (regno = reg_renumber[i]) >= 0) |
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387 | for (j = regno; |
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388 | j < regno + HARD_REGNO_NREGS (regno, |
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389 | PSEUDO_REGNO_MODE (i)); |
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390 | j++) |
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391 | SET_HARD_REG_BIT (hard_regs_live, j); |
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392 | |
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393 | } |
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394 | |
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395 | /* Now scan the insns in the block, keeping track of what hard |
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396 | regs are live as we go. When we see a call, save the live |
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397 | call-clobbered hard regs. */ |
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398 | |
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399 | for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) |
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400 | { |
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401 | RTX_CODE code = GET_CODE (insn); |
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402 | |
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403 | if (GET_RTX_CLASS (code) == 'i') |
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404 | { |
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405 | rtx link; |
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406 | |
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407 | /* If some registers have been saved, see if INSN references |
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408 | any of them. We must restore them before the insn if so. */ |
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409 | |
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410 | if (n_regs_saved) |
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411 | restore_referenced_regs (PATTERN (insn), insn, insn_mode); |
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412 | |
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413 | /* NB: the normal procedure is to first enliven any |
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414 | registers set by insn, then deaden any registers that |
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415 | had their last use at insn. This is incorrect now, |
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416 | since multiple pseudos may have been mapped to the |
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417 | same hard reg, and the death notes are ambiguous. So |
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418 | it must be done in the other, safe, order. */ |
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419 | |
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420 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
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421 | if (REG_NOTE_KIND (link) == REG_DEAD) |
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422 | clear_reg_live (XEXP (link, 0)); |
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423 | |
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424 | /* When we reach a call, we need to save all registers that are |
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425 | live, call-used, not fixed, and not already saved. We must |
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426 | test at this point because registers that die in a CALL_INSN |
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427 | are not live across the call and likewise for registers that |
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428 | are born in the CALL_INSN. |
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429 | |
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430 | If registers are filled with parameters for this function, |
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431 | and some of these are also being set by this function, then |
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432 | they will not appear to die (no REG_DEAD note for them), |
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433 | to check if in fact they do, collect the set registers in |
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434 | hard_regs_live first. */ |
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435 | |
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436 | if (code == CALL_INSN) |
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437 | { |
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438 | HARD_REG_SET this_call_sets; |
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439 | { |
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440 | HARD_REG_SET old_hard_regs_live; |
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441 | |
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442 | /* Save the hard_regs_live information. */ |
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443 | COPY_HARD_REG_SET (old_hard_regs_live, hard_regs_live); |
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444 | |
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445 | /* Now calculate hard_regs_live for this CALL_INSN |
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446 | only. */ |
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447 | CLEAR_HARD_REG_SET (hard_regs_live); |
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448 | note_stores (PATTERN (insn), set_reg_live); |
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449 | COPY_HARD_REG_SET (this_call_sets, hard_regs_live); |
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450 | |
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451 | /* Restore the hard_regs_live information. */ |
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452 | COPY_HARD_REG_SET (hard_regs_live, old_hard_regs_live); |
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453 | } |
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454 | |
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455 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
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456 | if (call_used_regs[regno] && ! call_fixed_regs[regno] |
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457 | && TEST_HARD_REG_BIT (hard_regs_live, regno) |
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458 | /* It must not be set by this instruction. */ |
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459 | && ! TEST_HARD_REG_BIT (this_call_sets, regno) |
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460 | && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) |
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461 | regno += insert_save_restore (insn, 1, regno, |
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462 | insn_mode, 0); |
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463 | |
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464 | /* Put the information for this CALL_INSN on top of what |
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465 | we already had. */ |
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466 | IOR_HARD_REG_SET (hard_regs_live, this_call_sets); |
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467 | COPY_HARD_REG_SET (hard_regs_need_restore, hard_regs_saved); |
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468 | |
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469 | /* Must recompute n_regs_saved. */ |
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470 | n_regs_saved = 0; |
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471 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
---|
472 | if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) |
---|
473 | n_regs_saved++; |
---|
474 | } |
---|
475 | else |
---|
476 | { |
---|
477 | note_stores (PATTERN (insn), set_reg_live); |
---|
478 | #ifdef AUTO_INC_DEC |
---|
479 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
480 | if (REG_NOTE_KIND (link) == REG_INC) |
---|
481 | set_reg_live (XEXP (link, 0), NULL_RTX); |
---|
482 | #endif |
---|
483 | } |
---|
484 | |
---|
485 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
486 | if (REG_NOTE_KIND (link) == REG_UNUSED) |
---|
487 | clear_reg_live (XEXP (link, 0)); |
---|
488 | } |
---|
489 | |
---|
490 | if (insn == basic_block_end[b]) |
---|
491 | break; |
---|
492 | } |
---|
493 | |
---|
494 | /* At the end of the basic block, we must restore any registers that |
---|
495 | remain saved. If the last insn in the block is a JUMP_INSN, put |
---|
496 | the restore before the insn, otherwise, put it after the insn. */ |
---|
497 | |
---|
498 | if (n_regs_saved) |
---|
499 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
---|
500 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno)) |
---|
501 | regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN |
---|
502 | ? insn : NEXT_INSN (insn)), 0, |
---|
503 | regno, insn_mode, MOVE_MAX / UNITS_PER_WORD); |
---|
504 | |
---|
505 | /* If we added any insns at the start of the block, update the start |
---|
506 | of the block to point at those insns. */ |
---|
507 | basic_block_head[b] = NEXT_INSN (prev_block_last); |
---|
508 | } |
---|
509 | } |
---|
510 | |
---|
511 | /* Here from note_stores when an insn stores a value in a register. |
---|
512 | Set the proper bit or bits in hard_regs_live. All pseudos that have |
---|
513 | been assigned hard regs have had their register number changed already, |
---|
514 | so we can ignore pseudos. */ |
---|
515 | |
---|
516 | static void |
---|
517 | set_reg_live (reg, setter) |
---|
518 | rtx reg, setter; |
---|
519 | { |
---|
520 | register int regno, endregno, i; |
---|
521 | enum machine_mode mode = GET_MODE (reg); |
---|
522 | int word = 0; |
---|
523 | |
---|
524 | if (GET_CODE (reg) == SUBREG) |
---|
525 | { |
---|
526 | word = SUBREG_WORD (reg); |
---|
527 | reg = SUBREG_REG (reg); |
---|
528 | } |
---|
529 | |
---|
530 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) |
---|
531 | return; |
---|
532 | |
---|
533 | regno = REGNO (reg) + word; |
---|
534 | endregno = regno + HARD_REGNO_NREGS (regno, mode); |
---|
535 | |
---|
536 | for (i = regno; i < endregno; i++) |
---|
537 | { |
---|
538 | SET_HARD_REG_BIT (hard_regs_live, i); |
---|
539 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); |
---|
540 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); |
---|
541 | } |
---|
542 | } |
---|
543 | |
---|
544 | /* Here when a REG_DEAD note records the last use of a reg. Clear |
---|
545 | the appropriate bit or bits in hard_regs_live. Again we can ignore |
---|
546 | pseudos. */ |
---|
547 | |
---|
548 | static void |
---|
549 | clear_reg_live (reg) |
---|
550 | rtx reg; |
---|
551 | { |
---|
552 | register int regno, endregno, i; |
---|
553 | |
---|
554 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) |
---|
555 | return; |
---|
556 | |
---|
557 | regno = REGNO (reg); |
---|
558 | endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); |
---|
559 | |
---|
560 | for (i = regno; i < endregno; i++) |
---|
561 | { |
---|
562 | CLEAR_HARD_REG_BIT (hard_regs_live, i); |
---|
563 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); |
---|
564 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); |
---|
565 | } |
---|
566 | } |
---|
567 | |
---|
568 | /* If any register currently residing in the save area is referenced in X, |
---|
569 | which is part of INSN, emit code to restore the register in front of INSN. |
---|
570 | INSN_MODE is the mode to assign to any insns that we add. */ |
---|
571 | |
---|
572 | static void |
---|
573 | restore_referenced_regs (x, insn, insn_mode) |
---|
574 | rtx x; |
---|
575 | rtx insn; |
---|
576 | enum machine_mode insn_mode; |
---|
577 | { |
---|
578 | enum rtx_code code = GET_CODE (x); |
---|
579 | char *fmt; |
---|
580 | int i, j; |
---|
581 | |
---|
582 | if (code == CLOBBER) |
---|
583 | return; |
---|
584 | |
---|
585 | if (code == REG) |
---|
586 | { |
---|
587 | int regno = REGNO (x); |
---|
588 | |
---|
589 | /* If this is a pseudo, scan its memory location, since it might |
---|
590 | involve the use of another register, which might be saved. */ |
---|
591 | |
---|
592 | if (regno >= FIRST_PSEUDO_REGISTER |
---|
593 | && reg_equiv_mem[regno] != 0) |
---|
594 | restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), |
---|
595 | insn, insn_mode); |
---|
596 | else if (regno >= FIRST_PSEUDO_REGISTER |
---|
597 | && reg_equiv_address[regno] != 0) |
---|
598 | restore_referenced_regs (reg_equiv_address[regno], |
---|
599 | insn, insn_mode); |
---|
600 | |
---|
601 | /* Otherwise if this is a hard register, restore any piece of it that |
---|
602 | is currently saved. */ |
---|
603 | |
---|
604 | else if (regno < FIRST_PSEUDO_REGISTER) |
---|
605 | { |
---|
606 | int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
---|
607 | /* Save at most SAVEREGS at a time. This can not be larger than |
---|
608 | MOVE_MAX, because that causes insert_save_restore to fail. */ |
---|
609 | int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD); |
---|
610 | int endregno = regno + numregs; |
---|
611 | |
---|
612 | for (i = regno; i < endregno; i++) |
---|
613 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, i)) |
---|
614 | i += insert_save_restore (insn, 0, i, insn_mode, saveregs); |
---|
615 | } |
---|
616 | |
---|
617 | return; |
---|
618 | } |
---|
619 | |
---|
620 | fmt = GET_RTX_FORMAT (code); |
---|
621 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
622 | { |
---|
623 | if (fmt[i] == 'e') |
---|
624 | restore_referenced_regs (XEXP (x, i), insn, insn_mode); |
---|
625 | else if (fmt[i] == 'E') |
---|
626 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
627 | restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); |
---|
628 | } |
---|
629 | } |
---|
630 | |
---|
631 | /* Insert a sequence of insns to save or restore, SAVE_P says which, |
---|
632 | REGNO. Place these insns in front of INSN. INSN_MODE is the mode |
---|
633 | to assign to these insns. MAXRESTORE is the maximum number of registers |
---|
634 | which should be restored during this call (when SAVE_P == 0). It should |
---|
635 | never be less than 1 since we only work with entire registers. |
---|
636 | |
---|
637 | Note that we have verified in init_caller_save that we can do this |
---|
638 | with a simple SET, so use it. Set INSN_CODE to what we save there |
---|
639 | since the address might not be valid so the insn might not be recognized. |
---|
640 | These insns will be reloaded and have register elimination done by |
---|
641 | find_reload, so we need not worry about that here. |
---|
642 | |
---|
643 | Return the extra number of registers saved. */ |
---|
644 | |
---|
645 | static int |
---|
646 | insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) |
---|
647 | rtx insn; |
---|
648 | int save_p; |
---|
649 | int regno; |
---|
650 | enum machine_mode insn_mode; |
---|
651 | int maxrestore; |
---|
652 | { |
---|
653 | rtx pat; |
---|
654 | enum insn_code code; |
---|
655 | int i, numregs; |
---|
656 | |
---|
657 | /* A common failure mode if register status is not correct in the RTL |
---|
658 | is for this routine to be called with a REGNO we didn't expect to |
---|
659 | save. That will cause us to write an insn with a (nil) SET_DEST |
---|
660 | or SET_SRC. Instead of doing so and causing a crash later, check |
---|
661 | for this common case and abort here instead. This will remove one |
---|
662 | step in debugging such problems. */ |
---|
663 | |
---|
664 | if (regno_save_mem[regno][1] == 0) |
---|
665 | abort (); |
---|
666 | |
---|
667 | #ifdef HAVE_cc0 |
---|
668 | /* If INSN references CC0, put our insns in front of the insn that sets |
---|
669 | CC0. This is always safe, since the only way we could be passed an |
---|
670 | insn that references CC0 is for a restore, and doing a restore earlier |
---|
671 | isn't a problem. We do, however, assume here that CALL_INSNs don't |
---|
672 | reference CC0. Guard against non-INSN's like CODE_LABEL. */ |
---|
673 | |
---|
674 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) |
---|
675 | && reg_referenced_p (cc0_rtx, PATTERN (insn))) |
---|
676 | insn = prev_nonnote_insn (insn); |
---|
677 | #endif |
---|
678 | |
---|
679 | /* Get the pattern to emit and update our status. */ |
---|
680 | if (save_p) |
---|
681 | { |
---|
682 | int i, j, k; |
---|
683 | int ok; |
---|
684 | |
---|
685 | /* See if we can save several registers with a single instruction. |
---|
686 | Work backwards to the single register case. */ |
---|
687 | for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) |
---|
688 | { |
---|
689 | ok = 1; |
---|
690 | if (regno_save_mem[regno][i] != 0) |
---|
691 | for (j = 0; j < i; j++) |
---|
692 | { |
---|
693 | if (! call_used_regs[regno + j] || call_fixed_regs[regno + j] |
---|
694 | || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j) |
---|
695 | || TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) |
---|
696 | ok = 0; |
---|
697 | } |
---|
698 | else |
---|
699 | continue; |
---|
700 | |
---|
701 | /* Must do this one save at a time */ |
---|
702 | if (! ok) |
---|
703 | continue; |
---|
704 | |
---|
705 | pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i], |
---|
706 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno)); |
---|
707 | code = reg_save_code[regno][i]; |
---|
708 | |
---|
709 | /* Set hard_regs_saved for all the registers we saved. */ |
---|
710 | for (k = 0; k < i; k++) |
---|
711 | { |
---|
712 | SET_HARD_REG_BIT (hard_regs_saved, regno + k); |
---|
713 | SET_HARD_REG_BIT (hard_regs_need_restore, regno + k); |
---|
714 | n_regs_saved++; |
---|
715 | } |
---|
716 | |
---|
717 | numregs = i; |
---|
718 | break; |
---|
719 | } |
---|
720 | } |
---|
721 | else |
---|
722 | { |
---|
723 | int i, j, k; |
---|
724 | int ok; |
---|
725 | |
---|
726 | /* See if we can restore `maxrestore' registers at once. Work |
---|
727 | backwards to the single register case. */ |
---|
728 | for (i = maxrestore; i > 0; i--) |
---|
729 | { |
---|
730 | ok = 1; |
---|
731 | if (regno_save_mem[regno][i]) |
---|
732 | for (j = 0; j < i; j++) |
---|
733 | { |
---|
734 | if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j)) |
---|
735 | ok = 0; |
---|
736 | } |
---|
737 | else |
---|
738 | continue; |
---|
739 | |
---|
740 | /* Must do this one restore at a time */ |
---|
741 | if (! ok) |
---|
742 | continue; |
---|
743 | |
---|
744 | pat = gen_rtx (SET, VOIDmode, |
---|
745 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), |
---|
746 | regno), |
---|
747 | regno_save_mem[regno][i]); |
---|
748 | code = reg_restore_code[regno][i]; |
---|
749 | |
---|
750 | |
---|
751 | /* Clear status for all registers we restored. */ |
---|
752 | for (k = 0; k < i; k++) |
---|
753 | { |
---|
754 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k); |
---|
755 | n_regs_saved--; |
---|
756 | } |
---|
757 | |
---|
758 | numregs = i; |
---|
759 | break; |
---|
760 | } |
---|
761 | } |
---|
762 | /* Emit the insn and set the code and mode. */ |
---|
763 | |
---|
764 | insn = emit_insn_before (pat, insn); |
---|
765 | PUT_MODE (insn, insn_mode); |
---|
766 | INSN_CODE (insn) = code; |
---|
767 | |
---|
768 | /* Tell our callers how many extra registers we saved/restored */ |
---|
769 | return numregs - 1; |
---|
770 | } |
---|