1 | /* Register to Stack convert for GNU compiler. |
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2 | Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. |
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3 | |
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4 | This file is part of GNU CC. |
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5 | |
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6 | GNU CC is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 2, or (at your option) |
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9 | any later version. |
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10 | |
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11 | GNU CC is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |
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16 | You should have received a copy of the GNU General Public License |
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17 | along with GNU CC; see the file COPYING. If not, write to |
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18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
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19 | Boston, MA 02111-1307, USA. */ |
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20 | |
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21 | /* This pass converts stack-like registers from the "flat register |
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22 | file" model that gcc uses, to a stack convention that the 387 uses. |
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23 | |
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24 | * The form of the input: |
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25 | |
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26 | On input, the function consists of insn that have had their |
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27 | registers fully allocated to a set of "virtual" registers. Note that |
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28 | the word "virtual" is used differently here than elsewhere in gcc: for |
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29 | each virtual stack reg, there is a hard reg, but the mapping between |
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30 | them is not known until this pass is run. On output, hard register |
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31 | numbers have been substituted, and various pop and exchange insns have |
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32 | been emitted. The hard register numbers and the virtual register |
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33 | numbers completely overlap - before this pass, all stack register |
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34 | numbers are virtual, and afterward they are all hard. |
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35 | |
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36 | The virtual registers can be manipulated normally by gcc, and their |
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37 | semantics are the same as for normal registers. After the hard |
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38 | register numbers are substituted, the semantics of an insn containing |
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39 | stack-like regs are not the same as for an insn with normal regs: for |
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40 | instance, it is not safe to delete an insn that appears to be a no-op |
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41 | move. In general, no insn containing hard regs should be changed |
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42 | after this pass is done. |
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43 | |
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44 | * The form of the output: |
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45 | |
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46 | After this pass, hard register numbers represent the distance from |
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47 | the current top of stack to the desired register. A reference to |
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48 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, |
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49 | represents the register just below that, and so forth. Also, REG_DEAD |
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50 | notes indicate whether or not a stack register should be popped. |
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51 | |
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52 | A "swap" insn looks like a parallel of two patterns, where each |
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53 | pattern is a SET: one sets A to B, the other B to A. |
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54 | |
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55 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG |
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56 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, |
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57 | will replace the existing stack top, not push a new value. |
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58 | |
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59 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose |
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60 | SET_SRC is REG or MEM. |
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61 | |
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62 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
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63 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
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64 | for FIRST_STACK_REG differentiates between a load insn and a pop. |
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65 | |
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66 | If a REG_DEAD is present, the insn represents a "pop" that discards |
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67 | the top of the register stack. If there is no REG_DEAD note, then the |
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68 | insn represents a "dup" or a push of the current top of stack onto the |
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69 | stack. |
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70 | |
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71 | * Methodology: |
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72 | |
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73 | Existing REG_DEAD and REG_UNUSED notes for stack registers are |
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74 | deleted and recreated from scratch. REG_DEAD is never created for a |
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75 | SET_DEST, only REG_UNUSED. |
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76 | |
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77 | Before life analysis, the mode of each insn is set based on whether |
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78 | or not any stack registers are mentioned within that insn. VOIDmode |
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79 | means that no regs are mentioned anyway, and QImode means that at |
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80 | least one pattern within the insn mentions stack registers. This |
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81 | information is valid until after reg_to_stack returns, and is used |
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82 | from jump_optimize. |
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83 | |
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84 | * asm_operands: |
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85 | |
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86 | There are several rules on the usage of stack-like regs in |
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87 | asm_operands insns. These rules apply only to the operands that are |
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88 | stack-like regs: |
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89 | |
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90 | 1. Given a set of input regs that die in an asm_operands, it is |
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91 | necessary to know which are implicitly popped by the asm, and |
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92 | which must be explicitly popped by gcc. |
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93 | |
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94 | An input reg that is implicitly popped by the asm must be |
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95 | explicitly clobbered, unless it is constrained to match an |
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96 | output operand. |
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97 | |
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98 | 2. For any input reg that is implicitly popped by an asm, it is |
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99 | necessary to know how to adjust the stack to compensate for the pop. |
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100 | If any non-popped input is closer to the top of the reg-stack than |
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101 | the implicitly popped reg, it would not be possible to know what the |
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102 | stack looked like - it's not clear how the rest of the stack "slides |
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103 | up". |
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104 | |
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105 | All implicitly popped input regs must be closer to the top of |
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106 | the reg-stack than any input that is not implicitly popped. |
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107 | |
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108 | 3. It is possible that if an input dies in an insn, reload might |
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109 | use the input reg for an output reload. Consider this example: |
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110 | |
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111 | asm ("foo" : "=t" (a) : "f" (b)); |
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112 | |
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113 | This asm says that input B is not popped by the asm, and that |
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114 | the asm pushes a result onto the reg-stack, ie, the stack is one |
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115 | deeper after the asm than it was before. But, it is possible that |
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116 | reload will think that it can use the same reg for both the input and |
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117 | the output, if input B dies in this insn. |
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118 | |
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119 | If any input operand uses the "f" constraint, all output reg |
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120 | constraints must use the "&" earlyclobber. |
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121 | |
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122 | The asm above would be written as |
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123 | |
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124 | asm ("foo" : "=&t" (a) : "f" (b)); |
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125 | |
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126 | 4. Some operands need to be in particular places on the stack. All |
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127 | output operands fall in this category - there is no other way to |
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128 | know which regs the outputs appear in unless the user indicates |
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129 | this in the constraints. |
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130 | |
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131 | Output operands must specifically indicate which reg an output |
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132 | appears in after an asm. "=f" is not allowed: the operand |
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133 | constraints must select a class with a single reg. |
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134 | |
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135 | 5. Output operands may not be "inserted" between existing stack regs. |
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136 | Since no 387 opcode uses a read/write operand, all output operands |
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137 | are dead before the asm_operands, and are pushed by the asm_operands. |
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138 | It makes no sense to push anywhere but the top of the reg-stack. |
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139 | |
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140 | Output operands must start at the top of the reg-stack: output |
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141 | operands may not "skip" a reg. |
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142 | |
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143 | 6. Some asm statements may need extra stack space for internal |
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144 | calculations. This can be guaranteed by clobbering stack registers |
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145 | unrelated to the inputs and outputs. |
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146 | |
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147 | Here are a couple of reasonable asms to want to write. This asm |
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148 | takes one input, which is internally popped, and produces two outputs. |
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149 | |
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150 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); |
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151 | |
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152 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, |
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153 | and replaces them with one output. The user must code the "st(1)" |
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154 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. |
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155 | |
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156 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); |
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157 | |
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158 | */ |
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159 | |
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160 | #include <stdio.h> |
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161 | #include "config.h" |
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162 | #include "tree.h" |
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163 | #include "rtl.h" |
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164 | #include "insn-config.h" |
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165 | #include "regs.h" |
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166 | #include "hard-reg-set.h" |
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167 | #include "flags.h" |
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168 | |
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169 | #ifdef STACK_REGS |
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170 | |
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171 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) |
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172 | |
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173 | /* This is the basic stack record. TOP is an index into REG[] such |
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174 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. |
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175 | |
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176 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
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177 | consists of placing each live reg in array `reg' and setting `top' |
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178 | appropriately. |
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179 | |
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180 | REG_SET indicates which registers are live. */ |
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181 | |
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182 | typedef struct stack_def |
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183 | { |
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184 | int top; /* index to top stack element */ |
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185 | HARD_REG_SET reg_set; /* set of live registers */ |
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186 | char reg[REG_STACK_SIZE]; /* register - stack mapping */ |
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187 | } *stack; |
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188 | |
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189 | /* highest instruction uid */ |
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190 | static int max_uid = 0; |
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191 | |
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192 | /* Number of basic blocks in the current function. */ |
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193 | static int blocks; |
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194 | |
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195 | /* Element N is first insn in basic block N. |
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196 | This info lasts until we finish compiling the function. */ |
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197 | static rtx *block_begin; |
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198 | |
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199 | /* Element N is last insn in basic block N. |
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200 | This info lasts until we finish compiling the function. */ |
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201 | static rtx *block_end; |
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202 | |
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203 | /* Element N is nonzero if control can drop into basic block N */ |
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204 | static char *block_drops_in; |
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205 | |
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206 | /* Element N says all about the stack at entry block N */ |
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207 | static stack block_stack_in; |
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208 | |
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209 | /* Element N says all about the stack life at the end of block N */ |
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210 | static HARD_REG_SET *block_out_reg_set; |
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211 | |
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212 | /* This is where the BLOCK_NUM values are really stored. This is set |
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213 | up by find_blocks and used there and in life_analysis. It can be used |
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214 | later, but only to look up an insn that is the head or tail of some |
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215 | block. life_analysis and the stack register conversion process can |
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216 | add insns within a block. */ |
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217 | static int *block_number; |
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218 | |
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219 | /* This is the register file for all register after conversion */ |
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220 | static rtx |
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221 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; |
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222 | |
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223 | #define FP_MODE_REG(regno,mode) \ |
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224 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)]) |
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225 | |
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226 | /* Get the basic block number of an insn. See note at block_number |
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227 | definition are validity of this information. */ |
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228 | |
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229 | #define BLOCK_NUM(INSN) \ |
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230 | ((INSN_UID (INSN) > max_uid) \ |
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231 | ? (abort() , -1) : block_number[INSN_UID (INSN)]) |
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232 | |
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233 | extern rtx forced_labels; |
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234 | extern rtx gen_jump (); |
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235 | extern rtx gen_movdf (), gen_movxf (); |
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236 | extern rtx find_regno_note (); |
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237 | extern rtx emit_jump_insn_before (); |
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238 | extern rtx emit_label_after (); |
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239 | |
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240 | /* Forward declarations */ |
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241 | |
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242 | static void find_blocks (); |
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243 | static uses_reg_or_mem (); |
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244 | static void stack_reg_life_analysis (); |
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245 | static void record_reg_life_pat (); |
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246 | static void change_stack (); |
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247 | static void convert_regs (); |
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248 | static void dump_stack_info (); |
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249 | |
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250 | /* Mark all registers needed for this pattern. */ |
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251 | |
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252 | static void |
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253 | mark_regs_pat (pat, set) |
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254 | rtx pat; |
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255 | HARD_REG_SET *set; |
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256 | { |
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257 | enum machine_mode mode; |
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258 | register int regno; |
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259 | register int count; |
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260 | |
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261 | if (GET_CODE (pat) == SUBREG) |
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262 | { |
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263 | mode = GET_MODE (pat); |
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264 | regno = SUBREG_WORD (pat); |
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265 | regno += REGNO (SUBREG_REG (pat)); |
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266 | } |
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267 | else |
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268 | regno = REGNO (pat), mode = GET_MODE (pat); |
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269 | |
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270 | for (count = HARD_REGNO_NREGS (regno, mode); |
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271 | count; count--, regno++) |
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272 | SET_HARD_REG_BIT (*set, regno); |
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273 | } |
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274 | |
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275 | /* Reorganise the stack into ascending numbers, |
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276 | after this insn. */ |
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277 | |
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278 | static void |
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279 | straighten_stack (insn, regstack) |
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280 | rtx insn; |
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281 | stack regstack; |
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282 | { |
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283 | struct stack_def temp_stack; |
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284 | int top; |
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285 | |
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286 | temp_stack.reg_set = regstack->reg_set; |
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287 | |
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288 | for (top = temp_stack.top = regstack->top; top >= 0; top--) |
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289 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
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290 | |
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291 | change_stack (insn, regstack, &temp_stack, emit_insn_after); |
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292 | } |
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293 | |
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294 | /* Return non-zero if any stack register is mentioned somewhere within PAT. */ |
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295 | |
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296 | int |
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297 | stack_regs_mentioned_p (pat) |
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298 | rtx pat; |
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299 | { |
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300 | register char *fmt; |
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301 | register int i; |
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302 | |
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303 | if (STACK_REG_P (pat)) |
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304 | return 1; |
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305 | |
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306 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
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307 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) |
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308 | { |
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309 | if (fmt[i] == 'E') |
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310 | { |
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311 | register int j; |
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312 | |
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313 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
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314 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) |
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315 | return 1; |
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316 | } |
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317 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) |
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318 | return 1; |
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319 | } |
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320 | |
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321 | return 0; |
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322 | } |
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323 | |
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324 | /* Convert register usage from "flat" register file usage to a "stack |
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325 | register file. FIRST is the first insn in the function, FILE is the |
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326 | dump file, if used. |
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327 | |
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328 | First compute the beginning and end of each basic block. Do a |
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329 | register life analysis on the stack registers, recording the result |
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330 | for the head and tail of each basic block. The convert each insn one |
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331 | by one. Run a last jump_optimize() pass, if optimizing, to eliminate |
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332 | any cross-jumping created when the converter inserts pop insns.*/ |
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333 | |
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334 | void |
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335 | reg_to_stack (first, file) |
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336 | rtx first; |
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337 | FILE *file; |
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338 | { |
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339 | register rtx insn; |
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340 | register int i; |
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341 | int stack_reg_seen = 0; |
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342 | enum machine_mode mode; |
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343 | HARD_REG_SET stackentry; |
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344 | |
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345 | CLEAR_HARD_REG_SET (stackentry); |
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346 | |
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347 | { |
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348 | static initialised; |
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349 | if (!initialised) |
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350 | { |
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351 | #if 0 |
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352 | initialised = 1; /* This array can not have been previously |
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353 | initialised, because the rtx's are |
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354 | thrown away between compilations of |
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355 | functions. */ |
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356 | #endif |
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357 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) |
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358 | { |
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359 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; |
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360 | mode = GET_MODE_WIDER_MODE (mode)) |
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361 | FP_MODE_REG (i, mode) = gen_rtx (REG, mode, i); |
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362 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode; |
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363 | mode = GET_MODE_WIDER_MODE (mode)) |
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364 | FP_MODE_REG (i, mode) = gen_rtx (REG, mode, i); |
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365 | } |
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366 | } |
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367 | } |
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368 | |
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369 | /* Count the basic blocks. Also find maximum insn uid. */ |
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370 | { |
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371 | register RTX_CODE prev_code = BARRIER; |
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372 | register RTX_CODE code; |
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373 | register before_function_beg = 1; |
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374 | |
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375 | max_uid = 0; |
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376 | blocks = 0; |
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377 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
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378 | { |
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379 | /* Note that this loop must select the same block boundaries |
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380 | as code in find_blocks. Also note that this code is not the |
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381 | same as that used in flow.c. */ |
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382 | |
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383 | if (INSN_UID (insn) > max_uid) |
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384 | max_uid = INSN_UID (insn); |
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385 | |
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386 | code = GET_CODE (insn); |
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387 | |
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388 | if (code == CODE_LABEL |
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389 | || (prev_code != INSN |
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390 | && prev_code != CALL_INSN |
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391 | && prev_code != CODE_LABEL |
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392 | && GET_RTX_CLASS (code) == 'i')) |
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393 | blocks++; |
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394 | |
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395 | if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) |
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396 | before_function_beg = 0; |
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397 | |
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398 | /* Remember whether or not this insn mentions an FP regs. |
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399 | Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */ |
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400 | |
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401 | if (GET_RTX_CLASS (code) == 'i' |
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402 | && stack_regs_mentioned_p (PATTERN (insn))) |
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403 | { |
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404 | stack_reg_seen = 1; |
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405 | PUT_MODE (insn, QImode); |
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406 | |
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407 | /* Note any register passing parameters. */ |
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408 | |
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409 | if (before_function_beg && code == INSN |
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410 | && GET_CODE (PATTERN (insn)) == USE) |
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411 | record_reg_life_pat (PATTERN (insn), (HARD_REG_SET*) 0, |
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412 | &stackentry, 1); |
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413 | } |
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414 | else |
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415 | PUT_MODE (insn, VOIDmode); |
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416 | |
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417 | if (code == CODE_LABEL) |
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418 | LABEL_REFS (insn) = insn; /* delete old chain */ |
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419 | |
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420 | if (code != NOTE) |
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421 | prev_code = code; |
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422 | } |
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423 | } |
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424 | |
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425 | /* If no stack register reference exists in this insn, there isn't |
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426 | anything to convert. */ |
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427 | |
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428 | if (! stack_reg_seen) |
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429 | return; |
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430 | |
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431 | /* If there are stack registers, there must be at least one block. */ |
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432 | |
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433 | if (! blocks) |
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434 | abort (); |
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435 | |
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436 | /* Allocate some tables that last till end of compiling this function |
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437 | and some needed only in find_blocks and life_analysis. */ |
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438 | |
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439 | block_begin = (rtx *) alloca (blocks * sizeof (rtx)); |
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440 | block_end = (rtx *) alloca (blocks * sizeof (rtx)); |
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441 | block_drops_in = (char *) alloca (blocks); |
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442 | |
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443 | block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def)); |
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444 | block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET)); |
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445 | bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def)); |
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446 | bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET)); |
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447 | |
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448 | block_number = (int *) alloca ((max_uid + 1) * sizeof (int)); |
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449 | |
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450 | find_blocks (first); |
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451 | stack_reg_life_analysis (first, &stackentry); |
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452 | |
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453 | /* Dump the life analysis debug information before jump |
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454 | optimization, as that will destroy the LABEL_REFS we keep the |
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455 | information in. */ |
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456 | |
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457 | if (file) |
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458 | dump_stack_info (file); |
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459 | |
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460 | convert_regs (); |
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461 | |
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462 | if (optimize) |
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463 | jump_optimize (first, 2, 0, 0); |
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464 | } |
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465 | |
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466 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the |
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467 | label's chain of references, and note which insn contains each |
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468 | reference. */ |
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469 | |
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470 | static void |
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471 | record_label_references (insn, pat) |
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472 | rtx insn, pat; |
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473 | { |
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474 | register enum rtx_code code = GET_CODE (pat); |
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475 | register int i; |
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476 | register char *fmt; |
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477 | |
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478 | if (code == LABEL_REF) |
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479 | { |
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480 | register rtx label = XEXP (pat, 0); |
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481 | register rtx ref; |
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482 | |
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483 | if (GET_CODE (label) != CODE_LABEL) |
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484 | abort (); |
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485 | |
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486 | /* Don't make a duplicate in the code_label's chain. */ |
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487 | |
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488 | for (ref = LABEL_REFS (label); |
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489 | ref && ref != label; |
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490 | ref = LABEL_NEXTREF (ref)) |
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491 | if (CONTAINING_INSN (ref) == insn) |
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492 | return; |
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493 | |
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494 | CONTAINING_INSN (pat) = insn; |
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495 | LABEL_NEXTREF (pat) = LABEL_REFS (label); |
---|
496 | LABEL_REFS (label) = pat; |
---|
497 | |
---|
498 | return; |
---|
499 | } |
---|
500 | |
---|
501 | fmt = GET_RTX_FORMAT (code); |
---|
502 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
503 | { |
---|
504 | if (fmt[i] == 'e') |
---|
505 | record_label_references (insn, XEXP (pat, i)); |
---|
506 | if (fmt[i] == 'E') |
---|
507 | { |
---|
508 | register int j; |
---|
509 | for (j = 0; j < XVECLEN (pat, i); j++) |
---|
510 | record_label_references (insn, XVECEXP (pat, i, j)); |
---|
511 | } |
---|
512 | } |
---|
513 | } |
---|
514 | |
---|
515 | /* Return a pointer to the REG expression within PAT. If PAT is not a |
---|
516 | REG, possible enclosed by a conversion rtx, return the inner part of |
---|
517 | PAT that stopped the search. */ |
---|
518 | |
---|
519 | static rtx * |
---|
520 | get_true_reg (pat) |
---|
521 | rtx *pat; |
---|
522 | { |
---|
523 | for (;;) |
---|
524 | switch (GET_CODE (*pat)) |
---|
525 | { |
---|
526 | case SUBREG: |
---|
527 | /* eliminate FP subregister accesses in favour of the |
---|
528 | actual FP register in use. */ |
---|
529 | { |
---|
530 | rtx subreg; |
---|
531 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) |
---|
532 | { |
---|
533 | *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat), |
---|
534 | GET_MODE (subreg)); |
---|
535 | default: |
---|
536 | return pat; |
---|
537 | } |
---|
538 | } |
---|
539 | case FLOAT: |
---|
540 | case FIX: |
---|
541 | case FLOAT_EXTEND: |
---|
542 | pat = & XEXP (*pat, 0); |
---|
543 | } |
---|
544 | } |
---|
545 | |
---|
546 | /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands. |
---|
547 | N_OPERANDS is the total number of operands. Return which alternative |
---|
548 | matched, or -1 is no alternative matches. |
---|
549 | |
---|
550 | OPERAND_MATCHES is an array which indicates which operand this |
---|
551 | operand matches due to the constraints, or -1 if no match is required. |
---|
552 | If two operands match by coincidence, but are not required to match by |
---|
553 | the constraints, -1 is returned. |
---|
554 | |
---|
555 | OPERAND_CLASS is an array which indicates the smallest class |
---|
556 | required by the constraints. If the alternative that matches calls |
---|
557 | for some class `class', and the operand matches a subclass of `class', |
---|
558 | OPERAND_CLASS is set to `class' as required by the constraints, not to |
---|
559 | the subclass. If an alternative allows more than one class, |
---|
560 | OPERAND_CLASS is set to the smallest class that is a union of the |
---|
561 | allowed classes. */ |
---|
562 | |
---|
563 | static int |
---|
564 | constrain_asm_operands (n_operands, operands, operand_constraints, |
---|
565 | operand_matches, operand_class) |
---|
566 | int n_operands; |
---|
567 | rtx *operands; |
---|
568 | char **operand_constraints; |
---|
569 | int *operand_matches; |
---|
570 | enum reg_class *operand_class; |
---|
571 | { |
---|
572 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); |
---|
573 | char *q; |
---|
574 | int this_alternative, this_operand; |
---|
575 | int n_alternatives; |
---|
576 | int j; |
---|
577 | |
---|
578 | for (j = 0; j < n_operands; j++) |
---|
579 | constraints[j] = operand_constraints[j]; |
---|
580 | |
---|
581 | /* Compute the number of alternatives in the operands. reload has |
---|
582 | already guaranteed that all operands have the same number of |
---|
583 | alternatives. */ |
---|
584 | |
---|
585 | n_alternatives = 1; |
---|
586 | for (q = constraints[0]; *q; q++) |
---|
587 | n_alternatives += (*q == ','); |
---|
588 | |
---|
589 | this_alternative = 0; |
---|
590 | while (this_alternative < n_alternatives) |
---|
591 | { |
---|
592 | int lose = 0; |
---|
593 | int i; |
---|
594 | |
---|
595 | /* No operands match, no narrow class requirements yet. */ |
---|
596 | for (i = 0; i < n_operands; i++) |
---|
597 | { |
---|
598 | operand_matches[i] = -1; |
---|
599 | operand_class[i] = NO_REGS; |
---|
600 | } |
---|
601 | |
---|
602 | for (this_operand = 0; this_operand < n_operands; this_operand++) |
---|
603 | { |
---|
604 | rtx op = operands[this_operand]; |
---|
605 | enum machine_mode mode = GET_MODE (op); |
---|
606 | char *p = constraints[this_operand]; |
---|
607 | int offset = 0; |
---|
608 | int win = 0; |
---|
609 | int c; |
---|
610 | |
---|
611 | if (GET_CODE (op) == SUBREG) |
---|
612 | { |
---|
613 | if (GET_CODE (SUBREG_REG (op)) == REG |
---|
614 | && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) |
---|
615 | offset = SUBREG_WORD (op); |
---|
616 | op = SUBREG_REG (op); |
---|
617 | } |
---|
618 | |
---|
619 | /* An empty constraint or empty alternative |
---|
620 | allows anything which matched the pattern. */ |
---|
621 | if (*p == 0 || *p == ',') |
---|
622 | win = 1; |
---|
623 | |
---|
624 | while (*p && (c = *p++) != ',') |
---|
625 | switch (c) |
---|
626 | { |
---|
627 | case '=': |
---|
628 | case '+': |
---|
629 | case '?': |
---|
630 | case '&': |
---|
631 | case '!': |
---|
632 | case '*': |
---|
633 | case '%': |
---|
634 | /* Ignore these. */ |
---|
635 | break; |
---|
636 | |
---|
637 | case '#': |
---|
638 | /* Ignore rest of this alternative. */ |
---|
639 | while (*p && *p != ',') p++; |
---|
640 | break; |
---|
641 | |
---|
642 | case '0': |
---|
643 | case '1': |
---|
644 | case '2': |
---|
645 | case '3': |
---|
646 | case '4': |
---|
647 | case '5': |
---|
648 | /* This operand must be the same as a previous one. |
---|
649 | This kind of constraint is used for instructions such |
---|
650 | as add when they take only two operands. |
---|
651 | |
---|
652 | Note that the lower-numbered operand is passed first. */ |
---|
653 | |
---|
654 | if (operands_match_p (operands[c - '0'], |
---|
655 | operands[this_operand])) |
---|
656 | { |
---|
657 | operand_matches[this_operand] = c - '0'; |
---|
658 | win = 1; |
---|
659 | } |
---|
660 | break; |
---|
661 | |
---|
662 | case 'p': |
---|
663 | /* p is used for address_operands. Since this is an asm, |
---|
664 | just to make sure that the operand is valid for Pmode. */ |
---|
665 | |
---|
666 | if (strict_memory_address_p (Pmode, op)) |
---|
667 | win = 1; |
---|
668 | break; |
---|
669 | |
---|
670 | case 'g': |
---|
671 | /* Anything goes unless it is a REG and really has a hard reg |
---|
672 | but the hard reg is not in the class GENERAL_REGS. */ |
---|
673 | if (GENERAL_REGS == ALL_REGS |
---|
674 | || GET_CODE (op) != REG |
---|
675 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode)) |
---|
676 | { |
---|
677 | if (GET_CODE (op) == REG) |
---|
678 | operand_class[this_operand] |
---|
679 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; |
---|
680 | win = 1; |
---|
681 | } |
---|
682 | break; |
---|
683 | |
---|
684 | case 'r': |
---|
685 | if (GET_CODE (op) == REG |
---|
686 | && (GENERAL_REGS == ALL_REGS |
---|
687 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode))) |
---|
688 | { |
---|
689 | operand_class[this_operand] |
---|
690 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; |
---|
691 | win = 1; |
---|
692 | } |
---|
693 | break; |
---|
694 | |
---|
695 | case 'X': |
---|
696 | /* This is used for a MATCH_SCRATCH in the cases when we |
---|
697 | don't actually need anything. So anything goes any time. */ |
---|
698 | win = 1; |
---|
699 | break; |
---|
700 | |
---|
701 | case 'm': |
---|
702 | if (GET_CODE (op) == MEM) |
---|
703 | win = 1; |
---|
704 | break; |
---|
705 | |
---|
706 | case '<': |
---|
707 | if (GET_CODE (op) == MEM |
---|
708 | && (GET_CODE (XEXP (op, 0)) == PRE_DEC |
---|
709 | || GET_CODE (XEXP (op, 0)) == POST_DEC)) |
---|
710 | win = 1; |
---|
711 | break; |
---|
712 | |
---|
713 | case '>': |
---|
714 | if (GET_CODE (op) == MEM |
---|
715 | && (GET_CODE (XEXP (op, 0)) == PRE_INC |
---|
716 | || GET_CODE (XEXP (op, 0)) == POST_INC)) |
---|
717 | win = 1; |
---|
718 | break; |
---|
719 | |
---|
720 | case 'E': |
---|
721 | /* Match any CONST_DOUBLE, but only if |
---|
722 | we can examine the bits of it reliably. */ |
---|
723 | if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT |
---|
724 | || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) |
---|
725 | && GET_CODE (op) != VOIDmode && ! flag_pretend_float) |
---|
726 | break; |
---|
727 | if (GET_CODE (op) == CONST_DOUBLE) |
---|
728 | win = 1; |
---|
729 | break; |
---|
730 | |
---|
731 | case 'F': |
---|
732 | if (GET_CODE (op) == CONST_DOUBLE) |
---|
733 | win = 1; |
---|
734 | break; |
---|
735 | |
---|
736 | case 'G': |
---|
737 | case 'H': |
---|
738 | if (GET_CODE (op) == CONST_DOUBLE |
---|
739 | && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) |
---|
740 | win = 1; |
---|
741 | break; |
---|
742 | |
---|
743 | case 's': |
---|
744 | if (GET_CODE (op) == CONST_INT |
---|
745 | || (GET_CODE (op) == CONST_DOUBLE |
---|
746 | && GET_MODE (op) == VOIDmode)) |
---|
747 | break; |
---|
748 | /* Fall through */ |
---|
749 | case 'i': |
---|
750 | if (CONSTANT_P (op)) |
---|
751 | win = 1; |
---|
752 | break; |
---|
753 | |
---|
754 | case 'n': |
---|
755 | if (GET_CODE (op) == CONST_INT |
---|
756 | || (GET_CODE (op) == CONST_DOUBLE |
---|
757 | && GET_MODE (op) == VOIDmode)) |
---|
758 | win = 1; |
---|
759 | break; |
---|
760 | |
---|
761 | case 'I': |
---|
762 | case 'J': |
---|
763 | case 'K': |
---|
764 | case 'L': |
---|
765 | case 'M': |
---|
766 | case 'N': |
---|
767 | case 'O': |
---|
768 | case 'P': |
---|
769 | if (GET_CODE (op) == CONST_INT |
---|
770 | && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) |
---|
771 | win = 1; |
---|
772 | break; |
---|
773 | |
---|
774 | #ifdef EXTRA_CONSTRAINT |
---|
775 | case 'Q': |
---|
776 | case 'R': |
---|
777 | case 'S': |
---|
778 | case 'T': |
---|
779 | case 'U': |
---|
780 | if (EXTRA_CONSTRAINT (op, c)) |
---|
781 | win = 1; |
---|
782 | break; |
---|
783 | #endif |
---|
784 | |
---|
785 | case 'V': |
---|
786 | if (GET_CODE (op) == MEM && ! offsettable_memref_p (op)) |
---|
787 | win = 1; |
---|
788 | break; |
---|
789 | |
---|
790 | case 'o': |
---|
791 | if (offsettable_memref_p (op)) |
---|
792 | win = 1; |
---|
793 | break; |
---|
794 | |
---|
795 | default: |
---|
796 | if (GET_CODE (op) == REG |
---|
797 | && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c), |
---|
798 | offset, mode)) |
---|
799 | { |
---|
800 | operand_class[this_operand] |
---|
801 | = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)]; |
---|
802 | win = 1; |
---|
803 | } |
---|
804 | } |
---|
805 | |
---|
806 | constraints[this_operand] = p; |
---|
807 | /* If this operand did not win somehow, |
---|
808 | this alternative loses. */ |
---|
809 | if (! win) |
---|
810 | lose = 1; |
---|
811 | } |
---|
812 | /* This alternative won; the operands are ok. |
---|
813 | Change whichever operands this alternative says to change. */ |
---|
814 | if (! lose) |
---|
815 | break; |
---|
816 | |
---|
817 | this_alternative++; |
---|
818 | } |
---|
819 | |
---|
820 | /* For operands constrained to match another operand, copy the other |
---|
821 | operand's class to this operand's class. */ |
---|
822 | for (j = 0; j < n_operands; j++) |
---|
823 | if (operand_matches[j] >= 0) |
---|
824 | operand_class[j] = operand_class[operand_matches[j]]; |
---|
825 | |
---|
826 | return this_alternative == n_alternatives ? -1 : this_alternative; |
---|
827 | } |
---|
828 | |
---|
829 | /* Record the life info of each stack reg in INSN, updating REGSTACK. |
---|
830 | N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS |
---|
831 | is an array of the constraint strings used in the asm statement. |
---|
832 | OPERANDS is an array of all operands for the insn, and is assumed to |
---|
833 | contain all output operands, then all inputs operands. |
---|
834 | |
---|
835 | There are many rules that an asm statement for stack-like regs must |
---|
836 | follow. Those rules are explained at the top of this file: the rule |
---|
837 | numbers below refer to that explanation. */ |
---|
838 | |
---|
839 | static void |
---|
840 | record_asm_reg_life (insn, regstack, operands, constraints, |
---|
841 | n_inputs, n_outputs) |
---|
842 | rtx insn; |
---|
843 | stack regstack; |
---|
844 | rtx *operands; |
---|
845 | char **constraints; |
---|
846 | int n_inputs, n_outputs; |
---|
847 | { |
---|
848 | int i; |
---|
849 | int n_operands = n_inputs + n_outputs; |
---|
850 | int first_input = n_outputs; |
---|
851 | int n_clobbers; |
---|
852 | int malformed_asm = 0; |
---|
853 | rtx body = PATTERN (insn); |
---|
854 | |
---|
855 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); |
---|
856 | |
---|
857 | enum reg_class *operand_class |
---|
858 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); |
---|
859 | |
---|
860 | int reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
---|
861 | int implicitly_dies[FIRST_PSEUDO_REGISTER]; |
---|
862 | |
---|
863 | rtx *clobber_reg; |
---|
864 | |
---|
865 | /* Find out what the constraints require. If no constraint |
---|
866 | alternative matches, this asm is malformed. */ |
---|
867 | i = constrain_asm_operands (n_operands, operands, constraints, |
---|
868 | operand_matches, operand_class); |
---|
869 | if (i < 0) |
---|
870 | malformed_asm = 1; |
---|
871 | |
---|
872 | /* Strip SUBREGs here to make the following code simpler. */ |
---|
873 | for (i = 0; i < n_operands; i++) |
---|
874 | if (GET_CODE (operands[i]) == SUBREG |
---|
875 | && GET_CODE (SUBREG_REG (operands[i])) == REG) |
---|
876 | operands[i] = SUBREG_REG (operands[i]); |
---|
877 | |
---|
878 | /* Set up CLOBBER_REG. */ |
---|
879 | |
---|
880 | n_clobbers = 0; |
---|
881 | |
---|
882 | if (GET_CODE (body) == PARALLEL) |
---|
883 | { |
---|
884 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); |
---|
885 | |
---|
886 | for (i = 0; i < XVECLEN (body, 0); i++) |
---|
887 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) |
---|
888 | { |
---|
889 | rtx clobber = XVECEXP (body, 0, i); |
---|
890 | rtx reg = XEXP (clobber, 0); |
---|
891 | |
---|
892 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
---|
893 | reg = SUBREG_REG (reg); |
---|
894 | |
---|
895 | if (STACK_REG_P (reg)) |
---|
896 | { |
---|
897 | clobber_reg[n_clobbers] = reg; |
---|
898 | n_clobbers++; |
---|
899 | } |
---|
900 | } |
---|
901 | } |
---|
902 | |
---|
903 | /* Enforce rule #4: Output operands must specifically indicate which |
---|
904 | reg an output appears in after an asm. "=f" is not allowed: the |
---|
905 | operand constraints must select a class with a single reg. |
---|
906 | |
---|
907 | Also enforce rule #5: Output operands must start at the top of |
---|
908 | the reg-stack: output operands may not "skip" a reg. */ |
---|
909 | |
---|
910 | bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output)); |
---|
911 | for (i = 0; i < n_outputs; i++) |
---|
912 | if (STACK_REG_P (operands[i])) |
---|
913 | if (reg_class_size[(int) operand_class[i]] != 1) |
---|
914 | { |
---|
915 | error_for_asm |
---|
916 | (insn, "Output constraint %d must specify a single register", i); |
---|
917 | malformed_asm = 1; |
---|
918 | } |
---|
919 | else |
---|
920 | reg_used_as_output[REGNO (operands[i])] = 1; |
---|
921 | |
---|
922 | |
---|
923 | /* Search for first non-popped reg. */ |
---|
924 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) |
---|
925 | if (! reg_used_as_output[i]) |
---|
926 | break; |
---|
927 | |
---|
928 | /* If there are any other popped regs, that's an error. */ |
---|
929 | for (; i < LAST_STACK_REG + 1; i++) |
---|
930 | if (reg_used_as_output[i]) |
---|
931 | break; |
---|
932 | |
---|
933 | if (i != LAST_STACK_REG + 1) |
---|
934 | { |
---|
935 | error_for_asm (insn, "Output regs must be grouped at top of stack"); |
---|
936 | malformed_asm = 1; |
---|
937 | } |
---|
938 | |
---|
939 | /* Enforce rule #2: All implicitly popped input regs must be closer |
---|
940 | to the top of the reg-stack than any input that is not implicitly |
---|
941 | popped. */ |
---|
942 | |
---|
943 | bzero ((char *) implicitly_dies, sizeof (implicitly_dies)); |
---|
944 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
945 | if (STACK_REG_P (operands[i])) |
---|
946 | { |
---|
947 | /* An input reg is implicitly popped if it is tied to an |
---|
948 | output, or if there is a CLOBBER for it. */ |
---|
949 | int j; |
---|
950 | |
---|
951 | for (j = 0; j < n_clobbers; j++) |
---|
952 | if (operands_match_p (clobber_reg[j], operands[i])) |
---|
953 | break; |
---|
954 | |
---|
955 | if (j < n_clobbers || operand_matches[i] >= 0) |
---|
956 | implicitly_dies[REGNO (operands[i])] = 1; |
---|
957 | } |
---|
958 | |
---|
959 | /* Search for first non-popped reg. */ |
---|
960 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) |
---|
961 | if (! implicitly_dies[i]) |
---|
962 | break; |
---|
963 | |
---|
964 | /* If there are any other popped regs, that's an error. */ |
---|
965 | for (; i < LAST_STACK_REG + 1; i++) |
---|
966 | if (implicitly_dies[i]) |
---|
967 | break; |
---|
968 | |
---|
969 | if (i != LAST_STACK_REG + 1) |
---|
970 | { |
---|
971 | error_for_asm (insn, |
---|
972 | "Implicitly popped regs must be grouped at top of stack"); |
---|
973 | malformed_asm = 1; |
---|
974 | } |
---|
975 | |
---|
976 | /* Enfore rule #3: If any input operand uses the "f" constraint, all |
---|
977 | output constraints must use the "&" earlyclobber. |
---|
978 | |
---|
979 | ??? Detect this more deterministically by having constraint_asm_operands |
---|
980 | record any earlyclobber. */ |
---|
981 | |
---|
982 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
983 | if (operand_matches[i] == -1) |
---|
984 | { |
---|
985 | int j; |
---|
986 | |
---|
987 | for (j = 0; j < n_outputs; j++) |
---|
988 | if (operands_match_p (operands[j], operands[i])) |
---|
989 | { |
---|
990 | error_for_asm (insn, |
---|
991 | "Output operand %d must use `&' constraint", j); |
---|
992 | malformed_asm = 1; |
---|
993 | } |
---|
994 | } |
---|
995 | |
---|
996 | if (malformed_asm) |
---|
997 | { |
---|
998 | /* Avoid further trouble with this insn. */ |
---|
999 | PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); |
---|
1000 | PUT_MODE (insn, VOIDmode); |
---|
1001 | return; |
---|
1002 | } |
---|
1003 | |
---|
1004 | /* Process all outputs */ |
---|
1005 | for (i = 0; i < n_outputs; i++) |
---|
1006 | { |
---|
1007 | rtx op = operands[i]; |
---|
1008 | |
---|
1009 | if (! STACK_REG_P (op)) |
---|
1010 | if (stack_regs_mentioned_p (op)) |
---|
1011 | abort (); |
---|
1012 | else |
---|
1013 | continue; |
---|
1014 | |
---|
1015 | /* Each destination is dead before this insn. If the |
---|
1016 | destination is not used after this insn, record this with |
---|
1017 | REG_UNUSED. */ |
---|
1018 | |
---|
1019 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))) |
---|
1020 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op, |
---|
1021 | REG_NOTES (insn)); |
---|
1022 | |
---|
1023 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op)); |
---|
1024 | } |
---|
1025 | |
---|
1026 | /* Process all inputs */ |
---|
1027 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
1028 | { |
---|
1029 | if (! STACK_REG_P (operands[i])) |
---|
1030 | if (stack_regs_mentioned_p (operands[i])) |
---|
1031 | abort (); |
---|
1032 | else |
---|
1033 | continue; |
---|
1034 | |
---|
1035 | /* If an input is dead after the insn, record a death note. |
---|
1036 | But don't record a death note if there is already a death note, |
---|
1037 | or if the input is also an output. */ |
---|
1038 | |
---|
1039 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])) |
---|
1040 | && operand_matches[i] == -1 |
---|
1041 | && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX) |
---|
1042 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i], |
---|
1043 | REG_NOTES (insn)); |
---|
1044 | |
---|
1045 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])); |
---|
1046 | } |
---|
1047 | } |
---|
1048 | |
---|
1049 | /* Scan PAT, which is part of INSN, and record registers appearing in |
---|
1050 | a SET_DEST in DEST, and other registers in SRC. |
---|
1051 | |
---|
1052 | This function does not know about SET_DESTs that are both input and |
---|
1053 | output (such as ZERO_EXTRACT) - this cannot happen on a 387. */ |
---|
1054 | |
---|
1055 | static void |
---|
1056 | record_reg_life_pat (pat, src, dest, douse) |
---|
1057 | rtx pat; |
---|
1058 | HARD_REG_SET *src, *dest; |
---|
1059 | int douse; |
---|
1060 | { |
---|
1061 | register char *fmt; |
---|
1062 | register int i; |
---|
1063 | |
---|
1064 | if (STACK_REG_P (pat) |
---|
1065 | || GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))) |
---|
1066 | { |
---|
1067 | if (src) |
---|
1068 | mark_regs_pat (pat, src); |
---|
1069 | |
---|
1070 | if (dest) |
---|
1071 | mark_regs_pat (pat, dest); |
---|
1072 | |
---|
1073 | return; |
---|
1074 | } |
---|
1075 | |
---|
1076 | if (GET_CODE (pat) == SET) |
---|
1077 | { |
---|
1078 | record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0); |
---|
1079 | record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0); |
---|
1080 | return; |
---|
1081 | } |
---|
1082 | |
---|
1083 | /* We don't need to consider either of these cases. */ |
---|
1084 | if (GET_CODE (pat) == USE && !douse || GET_CODE (pat) == CLOBBER) |
---|
1085 | return; |
---|
1086 | |
---|
1087 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
---|
1088 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) |
---|
1089 | { |
---|
1090 | if (fmt[i] == 'E') |
---|
1091 | { |
---|
1092 | register int j; |
---|
1093 | |
---|
1094 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
---|
1095 | record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0); |
---|
1096 | } |
---|
1097 | else if (fmt[i] == 'e') |
---|
1098 | record_reg_life_pat (XEXP (pat, i), src, dest, 0); |
---|
1099 | } |
---|
1100 | } |
---|
1101 | |
---|
1102 | /* Calculate the number of inputs and outputs in BODY, an |
---|
1103 | asm_operands. N_OPERANDS is the total number of operands, and |
---|
1104 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are |
---|
1105 | placed. */ |
---|
1106 | |
---|
1107 | static void |
---|
1108 | get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs) |
---|
1109 | rtx body; |
---|
1110 | int n_operands; |
---|
1111 | int *n_inputs, *n_outputs; |
---|
1112 | { |
---|
1113 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) |
---|
1114 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); |
---|
1115 | |
---|
1116 | else if (GET_CODE (body) == ASM_OPERANDS) |
---|
1117 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body); |
---|
1118 | |
---|
1119 | else if (GET_CODE (body) == PARALLEL |
---|
1120 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) |
---|
1121 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); |
---|
1122 | |
---|
1123 | else if (GET_CODE (body) == PARALLEL |
---|
1124 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) |
---|
1125 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); |
---|
1126 | else |
---|
1127 | abort (); |
---|
1128 | |
---|
1129 | *n_outputs = n_operands - *n_inputs; |
---|
1130 | } |
---|
1131 | |
---|
1132 | /* Scan INSN, which is in BLOCK, and record the life & death of stack |
---|
1133 | registers in REGSTACK. This function is called to process insns from |
---|
1134 | the last insn in a block to the first. The actual scanning is done in |
---|
1135 | record_reg_life_pat. |
---|
1136 | |
---|
1137 | If a register is live after a CALL_INSN, but is not a value return |
---|
1138 | register for that CALL_INSN, then code is emitted to initialize that |
---|
1139 | register. The block_end[] data is kept accurate. |
---|
1140 | |
---|
1141 | Existing death and unset notes for stack registers are deleted |
---|
1142 | before processing the insn. */ |
---|
1143 | |
---|
1144 | static void |
---|
1145 | record_reg_life (insn, block, regstack) |
---|
1146 | rtx insn; |
---|
1147 | int block; |
---|
1148 | stack regstack; |
---|
1149 | { |
---|
1150 | rtx note, *note_link; |
---|
1151 | int n_operands; |
---|
1152 | |
---|
1153 | if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) |
---|
1154 | || INSN_DELETED_P (insn)) |
---|
1155 | return; |
---|
1156 | |
---|
1157 | /* Strip death notes for stack regs from this insn */ |
---|
1158 | |
---|
1159 | note_link = ®_NOTES(insn); |
---|
1160 | for (note = *note_link; note; note = XEXP (note, 1)) |
---|
1161 | if (STACK_REG_P (XEXP (note, 0)) |
---|
1162 | && (REG_NOTE_KIND (note) == REG_DEAD |
---|
1163 | || REG_NOTE_KIND (note) == REG_UNUSED)) |
---|
1164 | *note_link = XEXP (note, 1); |
---|
1165 | else |
---|
1166 | note_link = &XEXP (note, 1); |
---|
1167 | |
---|
1168 | /* Process all patterns in the insn. */ |
---|
1169 | |
---|
1170 | n_operands = asm_noperands (PATTERN (insn)); |
---|
1171 | if (n_operands >= 0) |
---|
1172 | { |
---|
1173 | /* This insn is an `asm' with operands. Decode the operands, |
---|
1174 | decide how many are inputs, and record the life information. */ |
---|
1175 | |
---|
1176 | rtx operands[MAX_RECOG_OPERANDS]; |
---|
1177 | rtx body = PATTERN (insn); |
---|
1178 | int n_inputs, n_outputs; |
---|
1179 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); |
---|
1180 | |
---|
1181 | decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR); |
---|
1182 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); |
---|
1183 | record_asm_reg_life (insn, regstack, operands, constraints, |
---|
1184 | n_inputs, n_outputs); |
---|
1185 | return; |
---|
1186 | } |
---|
1187 | |
---|
1188 | { |
---|
1189 | HARD_REG_SET src, dest; |
---|
1190 | int regno; |
---|
1191 | |
---|
1192 | CLEAR_HARD_REG_SET (src); |
---|
1193 | CLEAR_HARD_REG_SET (dest); |
---|
1194 | |
---|
1195 | if (GET_CODE (insn) == CALL_INSN) |
---|
1196 | for (note = CALL_INSN_FUNCTION_USAGE (insn); |
---|
1197 | note; |
---|
1198 | note = XEXP (note, 1)) |
---|
1199 | if (GET_CODE (XEXP (note, 0)) == USE) |
---|
1200 | record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0); |
---|
1201 | |
---|
1202 | record_reg_life_pat (PATTERN (insn), &src, &dest, 0); |
---|
1203 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
---|
1204 | if (! TEST_HARD_REG_BIT (regstack->reg_set, regno)) |
---|
1205 | { |
---|
1206 | if (TEST_HARD_REG_BIT (src, regno) |
---|
1207 | && ! TEST_HARD_REG_BIT (dest, regno)) |
---|
1208 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, |
---|
1209 | FP_MODE_REG (regno, DFmode), |
---|
1210 | REG_NOTES (insn)); |
---|
1211 | else if (TEST_HARD_REG_BIT (dest, regno)) |
---|
1212 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, |
---|
1213 | FP_MODE_REG (regno, DFmode), |
---|
1214 | REG_NOTES (insn)); |
---|
1215 | } |
---|
1216 | |
---|
1217 | if (GET_CODE (insn) == CALL_INSN) |
---|
1218 | { |
---|
1219 | int reg; |
---|
1220 | |
---|
1221 | /* There might be a reg that is live after a function call. |
---|
1222 | Initialize it to zero so that the program does not crash. See |
---|
1223 | comment towards the end of stack_reg_life_analysis(). */ |
---|
1224 | |
---|
1225 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) |
---|
1226 | if (! TEST_HARD_REG_BIT (dest, reg) |
---|
1227 | && TEST_HARD_REG_BIT (regstack->reg_set, reg)) |
---|
1228 | { |
---|
1229 | rtx init, pat; |
---|
1230 | |
---|
1231 | /* The insn will use virtual register numbers, and so |
---|
1232 | convert_regs is expected to process these. But BLOCK_NUM |
---|
1233 | cannot be used on these insns, because they do not appear in |
---|
1234 | block_number[]. */ |
---|
1235 | |
---|
1236 | pat = gen_rtx (SET, VOIDmode, FP_MODE_REG (reg, DFmode), |
---|
1237 | CONST0_RTX (DFmode)); |
---|
1238 | init = emit_insn_after (pat, insn); |
---|
1239 | PUT_MODE (init, QImode); |
---|
1240 | |
---|
1241 | CLEAR_HARD_REG_BIT (regstack->reg_set, reg); |
---|
1242 | |
---|
1243 | /* If the CALL_INSN was the end of a block, move the |
---|
1244 | block_end to point to the new insn. */ |
---|
1245 | |
---|
1246 | if (block_end[block] == insn) |
---|
1247 | block_end[block] = init; |
---|
1248 | } |
---|
1249 | |
---|
1250 | /* Some regs do not survive a CALL */ |
---|
1251 | AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set); |
---|
1252 | } |
---|
1253 | |
---|
1254 | AND_COMPL_HARD_REG_SET (regstack->reg_set, dest); |
---|
1255 | IOR_HARD_REG_SET (regstack->reg_set, src); |
---|
1256 | } |
---|
1257 | } |
---|
1258 | |
---|
1259 | /* Find all basic blocks of the function, which starts with FIRST. |
---|
1260 | For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */ |
---|
1261 | |
---|
1262 | static void |
---|
1263 | find_blocks (first) |
---|
1264 | rtx first; |
---|
1265 | { |
---|
1266 | register rtx insn; |
---|
1267 | register int block; |
---|
1268 | register RTX_CODE prev_code = BARRIER; |
---|
1269 | register RTX_CODE code; |
---|
1270 | rtx label_value_list = 0; |
---|
1271 | |
---|
1272 | /* Record where all the blocks start and end. |
---|
1273 | Record which basic blocks control can drop in to. */ |
---|
1274 | |
---|
1275 | block = -1; |
---|
1276 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
---|
1277 | { |
---|
1278 | /* Note that this loop must select the same block boundaries |
---|
1279 | as code in reg_to_stack, but that these are not the same |
---|
1280 | as those selected in flow.c. */ |
---|
1281 | |
---|
1282 | code = GET_CODE (insn); |
---|
1283 | |
---|
1284 | if (code == CODE_LABEL |
---|
1285 | || (prev_code != INSN |
---|
1286 | && prev_code != CALL_INSN |
---|
1287 | && prev_code != CODE_LABEL |
---|
1288 | && GET_RTX_CLASS (code) == 'i')) |
---|
1289 | { |
---|
1290 | block_begin[++block] = insn; |
---|
1291 | block_end[block] = insn; |
---|
1292 | block_drops_in[block] = prev_code != BARRIER; |
---|
1293 | } |
---|
1294 | else if (GET_RTX_CLASS (code) == 'i') |
---|
1295 | block_end[block] = insn; |
---|
1296 | |
---|
1297 | if (GET_RTX_CLASS (code) == 'i') |
---|
1298 | { |
---|
1299 | rtx note; |
---|
1300 | |
---|
1301 | /* Make a list of all labels referred to other than by jumps. */ |
---|
1302 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
---|
1303 | if (REG_NOTE_KIND (note) == REG_LABEL) |
---|
1304 | label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0), |
---|
1305 | label_value_list); |
---|
1306 | } |
---|
1307 | |
---|
1308 | block_number[INSN_UID (insn)] = block; |
---|
1309 | |
---|
1310 | if (code != NOTE) |
---|
1311 | prev_code = code; |
---|
1312 | } |
---|
1313 | |
---|
1314 | if (block + 1 != blocks) |
---|
1315 | abort (); |
---|
1316 | |
---|
1317 | /* generate all label references to the corresponding jump insn */ |
---|
1318 | for (block = 0; block < blocks; block++) |
---|
1319 | { |
---|
1320 | insn = block_end[block]; |
---|
1321 | |
---|
1322 | if (GET_CODE (insn) == JUMP_INSN) |
---|
1323 | { |
---|
1324 | rtx pat = PATTERN (insn); |
---|
1325 | int computed_jump = 0; |
---|
1326 | rtx x; |
---|
1327 | |
---|
1328 | if (GET_CODE (pat) == PARALLEL) |
---|
1329 | { |
---|
1330 | int len = XVECLEN (pat, 0); |
---|
1331 | int has_use_labelref = 0; |
---|
1332 | int i; |
---|
1333 | |
---|
1334 | for (i = len - 1; i >= 0; i--) |
---|
1335 | if (GET_CODE (XVECEXP (pat, 0, i)) == USE |
---|
1336 | && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == LABEL_REF) |
---|
1337 | has_use_labelref = 1; |
---|
1338 | |
---|
1339 | if (! has_use_labelref) |
---|
1340 | for (i = len - 1; i >= 0; i--) |
---|
1341 | if (GET_CODE (XVECEXP (pat, 0, i)) == SET |
---|
1342 | && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx |
---|
1343 | && uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) |
---|
1344 | computed_jump = 1; |
---|
1345 | } |
---|
1346 | else if (GET_CODE (pat) == SET |
---|
1347 | && SET_DEST (pat) == pc_rtx |
---|
1348 | && uses_reg_or_mem (SET_SRC (pat))) |
---|
1349 | computed_jump = 1; |
---|
1350 | |
---|
1351 | if (computed_jump) |
---|
1352 | { |
---|
1353 | for (x = label_value_list; x; x = XEXP (x, 1)) |
---|
1354 | record_label_references (insn, |
---|
1355 | gen_rtx (LABEL_REF, VOIDmode, |
---|
1356 | XEXP (x, 0))); |
---|
1357 | |
---|
1358 | for (x = forced_labels; x; x = XEXP (x, 1)) |
---|
1359 | record_label_references (insn, |
---|
1360 | gen_rtx (LABEL_REF, VOIDmode, |
---|
1361 | XEXP (x, 0))); |
---|
1362 | } |
---|
1363 | |
---|
1364 | record_label_references (insn, pat); |
---|
1365 | } |
---|
1366 | } |
---|
1367 | } |
---|
1368 | |
---|
1369 | /* Return 1 if X contain a REG or MEM that is not in the constant pool. */ |
---|
1370 | |
---|
1371 | static int |
---|
1372 | uses_reg_or_mem (x) |
---|
1373 | rtx x; |
---|
1374 | { |
---|
1375 | enum rtx_code code = GET_CODE (x); |
---|
1376 | int i, j; |
---|
1377 | char *fmt; |
---|
1378 | |
---|
1379 | if (code == REG |
---|
1380 | || (code == MEM |
---|
1381 | && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF |
---|
1382 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))))) |
---|
1383 | return 1; |
---|
1384 | |
---|
1385 | fmt = GET_RTX_FORMAT (code); |
---|
1386 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1387 | { |
---|
1388 | if (fmt[i] == 'e' |
---|
1389 | && uses_reg_or_mem (XEXP (x, i))) |
---|
1390 | return 1; |
---|
1391 | |
---|
1392 | if (fmt[i] == 'E') |
---|
1393 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1394 | if (uses_reg_or_mem (XVECEXP (x, i, j))) |
---|
1395 | return 1; |
---|
1396 | } |
---|
1397 | |
---|
1398 | return 0; |
---|
1399 | } |
---|
1400 | |
---|
1401 | /* If current function returns its result in an fp stack register, |
---|
1402 | return the REG. Otherwise, return 0. */ |
---|
1403 | |
---|
1404 | static rtx |
---|
1405 | stack_result (decl) |
---|
1406 | tree decl; |
---|
1407 | { |
---|
1408 | rtx result = DECL_RTL (DECL_RESULT (decl)); |
---|
1409 | |
---|
1410 | if (result != 0 |
---|
1411 | && ! (GET_CODE (result) == REG |
---|
1412 | && REGNO (result) < FIRST_PSEUDO_REGISTER)) |
---|
1413 | { |
---|
1414 | #ifdef FUNCTION_OUTGOING_VALUE |
---|
1415 | result |
---|
1416 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); |
---|
1417 | #else |
---|
1418 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); |
---|
1419 | #endif |
---|
1420 | } |
---|
1421 | |
---|
1422 | return result != 0 && STACK_REG_P (result) ? result : 0; |
---|
1423 | } |
---|
1424 | |
---|
1425 | /* Determine the which registers are live at the start of each basic |
---|
1426 | block of the function whose first insn is FIRST. |
---|
1427 | |
---|
1428 | First, if the function returns a real_type, mark the function |
---|
1429 | return type as live at each return point, as the RTL may not give any |
---|
1430 | hint that the register is live. |
---|
1431 | |
---|
1432 | Then, start with the last block and work back to the first block. |
---|
1433 | Similarly, work backwards within each block, insn by insn, recording |
---|
1434 | which regs are dead and which are used (and therefore live) in the |
---|
1435 | hard reg set of block_stack_in[]. |
---|
1436 | |
---|
1437 | After processing each basic block, if there is a label at the start |
---|
1438 | of the block, propagate the live registers to all jumps to this block. |
---|
1439 | |
---|
1440 | As a special case, if there are regs live in this block, that are |
---|
1441 | not live in a block containing a jump to this label, and the block |
---|
1442 | containing the jump has already been processed, we must propagate this |
---|
1443 | block's entry register life back to the block containing the jump, and |
---|
1444 | restart life analysis from there. |
---|
1445 | |
---|
1446 | In the worst case, this function may traverse the insns |
---|
1447 | REG_STACK_SIZE times. This is necessary, since a jump towards the end |
---|
1448 | of the insns may not know that a reg is live at a target that is early |
---|
1449 | in the insns. So we back up and start over with the new reg live. |
---|
1450 | |
---|
1451 | If there are registers that are live at the start of the function, |
---|
1452 | insns are emitted to initialize these registers. Something similar is |
---|
1453 | done after CALL_INSNs in record_reg_life. */ |
---|
1454 | |
---|
1455 | static void |
---|
1456 | stack_reg_life_analysis (first, stackentry) |
---|
1457 | rtx first; |
---|
1458 | HARD_REG_SET *stackentry; |
---|
1459 | { |
---|
1460 | int reg, block; |
---|
1461 | struct stack_def regstack; |
---|
1462 | |
---|
1463 | { |
---|
1464 | rtx retvalue; |
---|
1465 | |
---|
1466 | if (retvalue = stack_result (current_function_decl)) |
---|
1467 | { |
---|
1468 | /* Find all RETURN insns and mark them. */ |
---|
1469 | |
---|
1470 | for (block = blocks - 1; --block >= 0;) |
---|
1471 | if (GET_CODE (block_end[block]) == JUMP_INSN |
---|
1472 | && GET_CODE (PATTERN (block_end[block])) == RETURN) |
---|
1473 | mark_regs_pat (retvalue, block_out_reg_set+block); |
---|
1474 | |
---|
1475 | /* Mark off the end of last block if we "fall off" the end of the |
---|
1476 | function into the epilogue. */ |
---|
1477 | |
---|
1478 | if (GET_CODE (block_end[blocks-1]) != JUMP_INSN |
---|
1479 | || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN) |
---|
1480 | mark_regs_pat (retvalue, block_out_reg_set+blocks-1); |
---|
1481 | } |
---|
1482 | } |
---|
1483 | |
---|
1484 | /* now scan all blocks backward for stack register use */ |
---|
1485 | |
---|
1486 | block = blocks - 1; |
---|
1487 | while (block >= 0) |
---|
1488 | { |
---|
1489 | register rtx insn, prev; |
---|
1490 | |
---|
1491 | /* current register status at last instruction */ |
---|
1492 | |
---|
1493 | COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]); |
---|
1494 | |
---|
1495 | prev = block_end[block]; |
---|
1496 | do |
---|
1497 | { |
---|
1498 | insn = prev; |
---|
1499 | prev = PREV_INSN (insn); |
---|
1500 | |
---|
1501 | /* If the insn is a CALL_INSN, we need to ensure that |
---|
1502 | everything dies. But otherwise don't process unless there |
---|
1503 | are some stack regs present. */ |
---|
1504 | |
---|
1505 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) |
---|
1506 | record_reg_life (insn, block, ®stack); |
---|
1507 | |
---|
1508 | } while (insn != block_begin[block]); |
---|
1509 | |
---|
1510 | /* Set the state at the start of the block. Mark that no |
---|
1511 | register mapping information known yet. */ |
---|
1512 | |
---|
1513 | COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set); |
---|
1514 | block_stack_in[block].top = -2; |
---|
1515 | |
---|
1516 | /* If there is a label, propagate our register life to all jumps |
---|
1517 | to this label. */ |
---|
1518 | |
---|
1519 | if (GET_CODE (insn) == CODE_LABEL) |
---|
1520 | { |
---|
1521 | register rtx label; |
---|
1522 | int must_restart = 0; |
---|
1523 | |
---|
1524 | for (label = LABEL_REFS (insn); label != insn; |
---|
1525 | label = LABEL_NEXTREF (label)) |
---|
1526 | { |
---|
1527 | int jump_block = BLOCK_NUM (CONTAINING_INSN (label)); |
---|
1528 | |
---|
1529 | if (jump_block < block) |
---|
1530 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], |
---|
1531 | block_stack_in[block].reg_set); |
---|
1532 | else |
---|
1533 | { |
---|
1534 | /* The block containing the jump has already been |
---|
1535 | processed. If there are registers that were not known |
---|
1536 | to be live then, but are live now, we must back up |
---|
1537 | and restart life analysis from that point with the new |
---|
1538 | life information. */ |
---|
1539 | |
---|
1540 | GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set, |
---|
1541 | block_out_reg_set[jump_block], |
---|
1542 | win); |
---|
1543 | |
---|
1544 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], |
---|
1545 | block_stack_in[block].reg_set); |
---|
1546 | |
---|
1547 | block = jump_block; |
---|
1548 | must_restart = 1; |
---|
1549 | |
---|
1550 | win: |
---|
1551 | ; |
---|
1552 | } |
---|
1553 | } |
---|
1554 | if (must_restart) |
---|
1555 | continue; |
---|
1556 | } |
---|
1557 | |
---|
1558 | if (block_drops_in[block]) |
---|
1559 | IOR_HARD_REG_SET (block_out_reg_set[block-1], |
---|
1560 | block_stack_in[block].reg_set); |
---|
1561 | |
---|
1562 | block -= 1; |
---|
1563 | } |
---|
1564 | |
---|
1565 | /* If any reg is live at the start of the first block of a |
---|
1566 | function, then we must guarantee that the reg holds some value by |
---|
1567 | generating our own "load" of that register. Otherwise a 387 would |
---|
1568 | fault trying to access an empty register. */ |
---|
1569 | |
---|
1570 | /* Load zero into each live register. The fact that a register |
---|
1571 | appears live at the function start necessarily implies an error |
---|
1572 | in the user program: it means that (unless the offending code is *never* |
---|
1573 | executed) this program is using uninitialised floating point |
---|
1574 | variables. In order to keep broken code like this happy, we initialise |
---|
1575 | those variables with zero. |
---|
1576 | |
---|
1577 | Note that we are inserting virtual register references here: |
---|
1578 | these insns must be processed by convert_regs later. Also, these |
---|
1579 | insns will not be in block_number, so BLOCK_NUM() will fail for them. */ |
---|
1580 | |
---|
1581 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) |
---|
1582 | if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg) |
---|
1583 | && ! TEST_HARD_REG_BIT (*stackentry, reg)) |
---|
1584 | { |
---|
1585 | rtx init_rtx; |
---|
1586 | |
---|
1587 | init_rtx = gen_rtx (SET, VOIDmode, FP_MODE_REG(reg, DFmode), |
---|
1588 | CONST0_RTX (DFmode)); |
---|
1589 | block_begin[0] = emit_insn_after (init_rtx, first); |
---|
1590 | PUT_MODE (block_begin[0], QImode); |
---|
1591 | |
---|
1592 | CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg); |
---|
1593 | } |
---|
1594 | } |
---|
1595 | |
---|
1596 | /***************************************************************************** |
---|
1597 | This section deals with stack register substitution, and forms the second |
---|
1598 | pass over the RTL. |
---|
1599 | *****************************************************************************/ |
---|
1600 | |
---|
1601 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for |
---|
1602 | the desired hard REGNO. */ |
---|
1603 | |
---|
1604 | static void |
---|
1605 | replace_reg (reg, regno) |
---|
1606 | rtx *reg; |
---|
1607 | int regno; |
---|
1608 | { |
---|
1609 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG |
---|
1610 | || ! STACK_REG_P (*reg)) |
---|
1611 | abort (); |
---|
1612 | |
---|
1613 | switch (GET_MODE_CLASS (GET_MODE (*reg))) |
---|
1614 | { |
---|
1615 | default: abort (); |
---|
1616 | case MODE_FLOAT: |
---|
1617 | case MODE_COMPLEX_FLOAT:; |
---|
1618 | } |
---|
1619 | |
---|
1620 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
---|
1621 | } |
---|
1622 | |
---|
1623 | /* Remove a note of type NOTE, which must be found, for register |
---|
1624 | number REGNO from INSN. Remove only one such note. */ |
---|
1625 | |
---|
1626 | static void |
---|
1627 | remove_regno_note (insn, note, regno) |
---|
1628 | rtx insn; |
---|
1629 | enum reg_note note; |
---|
1630 | int regno; |
---|
1631 | { |
---|
1632 | register rtx *note_link, this; |
---|
1633 | |
---|
1634 | note_link = ®_NOTES(insn); |
---|
1635 | for (this = *note_link; this; this = XEXP (this, 1)) |
---|
1636 | if (REG_NOTE_KIND (this) == note |
---|
1637 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) |
---|
1638 | { |
---|
1639 | *note_link = XEXP (this, 1); |
---|
1640 | return; |
---|
1641 | } |
---|
1642 | else |
---|
1643 | note_link = &XEXP (this, 1); |
---|
1644 | |
---|
1645 | abort (); |
---|
1646 | } |
---|
1647 | |
---|
1648 | /* Find the hard register number of virtual register REG in REGSTACK. |
---|
1649 | The hard register number is relative to the top of the stack. -1 is |
---|
1650 | returned if the register is not found. */ |
---|
1651 | |
---|
1652 | static int |
---|
1653 | get_hard_regnum (regstack, reg) |
---|
1654 | stack regstack; |
---|
1655 | rtx reg; |
---|
1656 | { |
---|
1657 | int i; |
---|
1658 | |
---|
1659 | if (! STACK_REG_P (reg)) |
---|
1660 | abort (); |
---|
1661 | |
---|
1662 | for (i = regstack->top; i >= 0; i--) |
---|
1663 | if (regstack->reg[i] == REGNO (reg)) |
---|
1664 | break; |
---|
1665 | |
---|
1666 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; |
---|
1667 | } |
---|
1668 | |
---|
1669 | /* Delete INSN from the RTL. Mark the insn, but don't remove it from |
---|
1670 | the chain of insns. Doing so could confuse block_begin and block_end |
---|
1671 | if this were the only insn in the block. */ |
---|
1672 | |
---|
1673 | static void |
---|
1674 | delete_insn_for_stacker (insn) |
---|
1675 | rtx insn; |
---|
1676 | { |
---|
1677 | PUT_CODE (insn, NOTE); |
---|
1678 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; |
---|
1679 | NOTE_SOURCE_FILE (insn) = 0; |
---|
1680 | } |
---|
1681 | |
---|
1682 | /* Emit an insn to pop virtual register REG before or after INSN. |
---|
1683 | REGSTACK is the stack state after INSN and is updated to reflect this |
---|
1684 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
---|
1685 | is represented as a SET whose destination is the register to be popped |
---|
1686 | and source is the top of stack. A death note for the top of stack |
---|
1687 | cases the movdf pattern to pop. */ |
---|
1688 | |
---|
1689 | static rtx |
---|
1690 | emit_pop_insn (insn, regstack, reg, when) |
---|
1691 | rtx insn; |
---|
1692 | stack regstack; |
---|
1693 | rtx reg; |
---|
1694 | rtx (*when)(); |
---|
1695 | { |
---|
1696 | rtx pop_insn, pop_rtx; |
---|
1697 | int hard_regno; |
---|
1698 | |
---|
1699 | hard_regno = get_hard_regnum (regstack, reg); |
---|
1700 | |
---|
1701 | if (hard_regno < FIRST_STACK_REG) |
---|
1702 | abort (); |
---|
1703 | |
---|
1704 | pop_rtx = gen_rtx (SET, VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
---|
1705 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); |
---|
1706 | |
---|
1707 | pop_insn = (*when) (pop_rtx, insn); |
---|
1708 | /* ??? This used to be VOIDmode, but that seems wrong. */ |
---|
1709 | PUT_MODE (pop_insn, QImode); |
---|
1710 | |
---|
1711 | REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD, |
---|
1712 | FP_MODE_REG (FIRST_STACK_REG, DFmode), |
---|
1713 | REG_NOTES (pop_insn)); |
---|
1714 | |
---|
1715 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] |
---|
1716 | = regstack->reg[regstack->top]; |
---|
1717 | regstack->top -= 1; |
---|
1718 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); |
---|
1719 | |
---|
1720 | return pop_insn; |
---|
1721 | } |
---|
1722 | |
---|
1723 | /* Emit an insn before or after INSN to swap virtual register REG with the |
---|
1724 | top of stack. WHEN should be `emit_insn_before' or `emit_insn_before' |
---|
1725 | REGSTACK is the stack state before the swap, and is updated to reflect |
---|
1726 | the swap. A swap insn is represented as a PARALLEL of two patterns: |
---|
1727 | each pattern moves one reg to the other. |
---|
1728 | |
---|
1729 | If REG is already at the top of the stack, no insn is emitted. */ |
---|
1730 | |
---|
1731 | static void |
---|
1732 | emit_swap_insn (insn, regstack, reg) |
---|
1733 | rtx insn; |
---|
1734 | stack regstack; |
---|
1735 | rtx reg; |
---|
1736 | { |
---|
1737 | int hard_regno; |
---|
1738 | rtx gen_swapdf(); |
---|
1739 | rtx swap_rtx, swap_insn; |
---|
1740 | int tmp, other_reg; /* swap regno temps */ |
---|
1741 | rtx i1; /* the stack-reg insn prior to INSN */ |
---|
1742 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ |
---|
1743 | |
---|
1744 | hard_regno = get_hard_regnum (regstack, reg); |
---|
1745 | |
---|
1746 | if (hard_regno < FIRST_STACK_REG) |
---|
1747 | abort (); |
---|
1748 | if (hard_regno == FIRST_STACK_REG) |
---|
1749 | return; |
---|
1750 | |
---|
1751 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
---|
1752 | |
---|
1753 | tmp = regstack->reg[other_reg]; |
---|
1754 | regstack->reg[other_reg] = regstack->reg[regstack->top]; |
---|
1755 | regstack->reg[regstack->top] = tmp; |
---|
1756 | |
---|
1757 | /* Find the previous insn involving stack regs, but don't go past |
---|
1758 | any labels, calls or jumps. */ |
---|
1759 | i1 = prev_nonnote_insn (insn); |
---|
1760 | while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode) |
---|
1761 | i1 = prev_nonnote_insn (i1); |
---|
1762 | |
---|
1763 | if (i1) |
---|
1764 | i1set = single_set (i1); |
---|
1765 | |
---|
1766 | if (i1set) |
---|
1767 | { |
---|
1768 | rtx i2; /* the stack-reg insn prior to I1 */ |
---|
1769 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); |
---|
1770 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
---|
1771 | |
---|
1772 | /* If the previous register stack push was from the reg we are to |
---|
1773 | swap with, omit the swap. */ |
---|
1774 | |
---|
1775 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG |
---|
1776 | && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1 |
---|
1777 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
---|
1778 | return; |
---|
1779 | |
---|
1780 | /* If the previous insn wrote to the reg we are to swap with, |
---|
1781 | omit the swap. */ |
---|
1782 | |
---|
1783 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno |
---|
1784 | && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG |
---|
1785 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) |
---|
1786 | return; |
---|
1787 | } |
---|
1788 | |
---|
1789 | if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1))) |
---|
1790 | { |
---|
1791 | i1 = next_nonnote_insn (i1); |
---|
1792 | if (i1 == insn) |
---|
1793 | abort (); |
---|
1794 | } |
---|
1795 | |
---|
1796 | swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode), |
---|
1797 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); |
---|
1798 | swap_insn = emit_insn_after (swap_rtx, i1); |
---|
1799 | /* ??? This used to be VOIDmode, but that seems wrong. */ |
---|
1800 | PUT_MODE (swap_insn, QImode); |
---|
1801 | } |
---|
1802 | |
---|
1803 | /* Handle a move to or from a stack register in PAT, which is in INSN. |
---|
1804 | REGSTACK is the current stack. */ |
---|
1805 | |
---|
1806 | static void |
---|
1807 | move_for_stack_reg (insn, regstack, pat) |
---|
1808 | rtx insn; |
---|
1809 | stack regstack; |
---|
1810 | rtx pat; |
---|
1811 | { |
---|
1812 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
---|
1813 | rtx *pdest = get_true_reg (&SET_DEST (pat)); |
---|
1814 | rtx src, dest; |
---|
1815 | rtx note; |
---|
1816 | |
---|
1817 | src = *psrc; dest = *pdest; |
---|
1818 | |
---|
1819 | if (STACK_REG_P (src) && STACK_REG_P (dest)) |
---|
1820 | { |
---|
1821 | /* Write from one stack reg to another. If SRC dies here, then |
---|
1822 | just change the register mapping and delete the insn. */ |
---|
1823 | |
---|
1824 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
---|
1825 | if (note) |
---|
1826 | { |
---|
1827 | int i; |
---|
1828 | |
---|
1829 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
---|
1830 | if (REGNO (src) == REGNO (dest)) |
---|
1831 | abort (); |
---|
1832 | |
---|
1833 | for (i = regstack->top; i >= 0; i--) |
---|
1834 | if (regstack->reg[i] == REGNO (src)) |
---|
1835 | break; |
---|
1836 | |
---|
1837 | /* The source must be live, and the dest must be dead. */ |
---|
1838 | if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
---|
1839 | abort (); |
---|
1840 | |
---|
1841 | /* It is possible that the dest is unused after this insn. |
---|
1842 | If so, just pop the src. */ |
---|
1843 | |
---|
1844 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
---|
1845 | { |
---|
1846 | emit_pop_insn (insn, regstack, src, emit_insn_after); |
---|
1847 | |
---|
1848 | delete_insn_for_stacker (insn); |
---|
1849 | return; |
---|
1850 | } |
---|
1851 | |
---|
1852 | regstack->reg[i] = REGNO (dest); |
---|
1853 | |
---|
1854 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
---|
1855 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
---|
1856 | |
---|
1857 | delete_insn_for_stacker (insn); |
---|
1858 | |
---|
1859 | return; |
---|
1860 | } |
---|
1861 | |
---|
1862 | /* The source reg does not die. */ |
---|
1863 | |
---|
1864 | /* If this appears to be a no-op move, delete it, or else it |
---|
1865 | will confuse the machine description output patterns. But if |
---|
1866 | it is REG_UNUSED, we must pop the reg now, as per-insn processing |
---|
1867 | for REG_UNUSED will not work for deleted insns. */ |
---|
1868 | |
---|
1869 | if (REGNO (src) == REGNO (dest)) |
---|
1870 | { |
---|
1871 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
---|
1872 | emit_pop_insn (insn, regstack, dest, emit_insn_after); |
---|
1873 | |
---|
1874 | delete_insn_for_stacker (insn); |
---|
1875 | return; |
---|
1876 | } |
---|
1877 | |
---|
1878 | /* The destination ought to be dead */ |
---|
1879 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
---|
1880 | abort (); |
---|
1881 | |
---|
1882 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
---|
1883 | |
---|
1884 | regstack->reg[++regstack->top] = REGNO (dest); |
---|
1885 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
---|
1886 | replace_reg (pdest, FIRST_STACK_REG); |
---|
1887 | } |
---|
1888 | else if (STACK_REG_P (src)) |
---|
1889 | { |
---|
1890 | /* Save from a stack reg to MEM, or possibly integer reg. Since |
---|
1891 | only top of stack may be saved, emit an exchange first if |
---|
1892 | needs be. */ |
---|
1893 | |
---|
1894 | emit_swap_insn (insn, regstack, src); |
---|
1895 | |
---|
1896 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
---|
1897 | if (note) |
---|
1898 | { |
---|
1899 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); |
---|
1900 | regstack->top--; |
---|
1901 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
---|
1902 | } |
---|
1903 | else if (GET_MODE (src) == XFmode && regstack->top != REG_STACK_SIZE) |
---|
1904 | { |
---|
1905 | /* A 387 cannot write an XFmode value to a MEM without |
---|
1906 | clobbering the source reg. The output code can handle |
---|
1907 | this by reading back the value from the MEM. |
---|
1908 | But it is more efficient to use a temp register if one is |
---|
1909 | available. Push the source value here if the register |
---|
1910 | stack is not full, and then write the value to memory via |
---|
1911 | a pop. */ |
---|
1912 | rtx push_rtx, push_insn; |
---|
1913 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode); |
---|
1914 | |
---|
1915 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); |
---|
1916 | push_insn = emit_insn_before (push_rtx, insn); |
---|
1917 | PUT_MODE (push_insn, QImode); |
---|
1918 | REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, top_stack_reg, |
---|
1919 | REG_NOTES (insn)); |
---|
1920 | } |
---|
1921 | |
---|
1922 | replace_reg (psrc, FIRST_STACK_REG); |
---|
1923 | } |
---|
1924 | else if (STACK_REG_P (dest)) |
---|
1925 | { |
---|
1926 | /* Load from MEM, or possibly integer REG or constant, into the |
---|
1927 | stack regs. The actual target is always the top of the |
---|
1928 | stack. The stack mapping is changed to reflect that DEST is |
---|
1929 | now at top of stack. */ |
---|
1930 | |
---|
1931 | /* The destination ought to be dead */ |
---|
1932 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
---|
1933 | abort (); |
---|
1934 | |
---|
1935 | if (regstack->top >= REG_STACK_SIZE) |
---|
1936 | abort (); |
---|
1937 | |
---|
1938 | regstack->reg[++regstack->top] = REGNO (dest); |
---|
1939 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
---|
1940 | replace_reg (pdest, FIRST_STACK_REG); |
---|
1941 | } |
---|
1942 | else |
---|
1943 | abort (); |
---|
1944 | } |
---|
1945 | |
---|
1946 | void |
---|
1947 | swap_rtx_condition (pat) |
---|
1948 | rtx pat; |
---|
1949 | { |
---|
1950 | register char *fmt; |
---|
1951 | register int i; |
---|
1952 | |
---|
1953 | if (GET_RTX_CLASS (GET_CODE (pat)) == '<') |
---|
1954 | { |
---|
1955 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); |
---|
1956 | return; |
---|
1957 | } |
---|
1958 | |
---|
1959 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
---|
1960 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) |
---|
1961 | { |
---|
1962 | if (fmt[i] == 'E') |
---|
1963 | { |
---|
1964 | register int j; |
---|
1965 | |
---|
1966 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
---|
1967 | swap_rtx_condition (XVECEXP (pat, i, j)); |
---|
1968 | } |
---|
1969 | else if (fmt[i] == 'e') |
---|
1970 | swap_rtx_condition (XEXP (pat, i)); |
---|
1971 | } |
---|
1972 | } |
---|
1973 | |
---|
1974 | /* Handle a comparison. Special care needs to be taken to avoid |
---|
1975 | causing comparisons that a 387 cannot do correctly, such as EQ. |
---|
1976 | |
---|
1977 | Also, a pop insn may need to be emitted. The 387 does have an |
---|
1978 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
---|
1979 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to |
---|
1980 | set up. */ |
---|
1981 | |
---|
1982 | static void |
---|
1983 | compare_for_stack_reg (insn, regstack, pat) |
---|
1984 | rtx insn; |
---|
1985 | stack regstack; |
---|
1986 | rtx pat; |
---|
1987 | { |
---|
1988 | rtx *src1, *src2; |
---|
1989 | rtx src1_note, src2_note; |
---|
1990 | |
---|
1991 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); |
---|
1992 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); |
---|
1993 | |
---|
1994 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
---|
1995 | registers that die in this insn - move those to stack top first. */ |
---|
1996 | if (! STACK_REG_P (*src1) |
---|
1997 | || (STACK_REG_P (*src2) |
---|
1998 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) |
---|
1999 | { |
---|
2000 | rtx temp, next; |
---|
2001 | |
---|
2002 | temp = XEXP (SET_SRC (pat), 0); |
---|
2003 | XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1); |
---|
2004 | XEXP (SET_SRC (pat), 1) = temp; |
---|
2005 | |
---|
2006 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); |
---|
2007 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); |
---|
2008 | |
---|
2009 | next = next_cc0_user (insn); |
---|
2010 | if (next == NULL_RTX) |
---|
2011 | abort (); |
---|
2012 | |
---|
2013 | swap_rtx_condition (PATTERN (next)); |
---|
2014 | INSN_CODE (next) = -1; |
---|
2015 | INSN_CODE (insn) = -1; |
---|
2016 | } |
---|
2017 | |
---|
2018 | /* We will fix any death note later. */ |
---|
2019 | |
---|
2020 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
---|
2021 | |
---|
2022 | if (STACK_REG_P (*src2)) |
---|
2023 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); |
---|
2024 | else |
---|
2025 | src2_note = NULL_RTX; |
---|
2026 | |
---|
2027 | emit_swap_insn (insn, regstack, *src1); |
---|
2028 | |
---|
2029 | replace_reg (src1, FIRST_STACK_REG); |
---|
2030 | |
---|
2031 | if (STACK_REG_P (*src2)) |
---|
2032 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
---|
2033 | |
---|
2034 | if (src1_note) |
---|
2035 | { |
---|
2036 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0))); |
---|
2037 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
---|
2038 | regstack->top--; |
---|
2039 | } |
---|
2040 | |
---|
2041 | /* If the second operand dies, handle that. But if the operands are |
---|
2042 | the same stack register, don't bother, because only one death is |
---|
2043 | needed, and it was just handled. */ |
---|
2044 | |
---|
2045 | if (src2_note |
---|
2046 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
---|
2047 | && REGNO (*src1) == REGNO (*src2))) |
---|
2048 | { |
---|
2049 | /* As a special case, two regs may die in this insn if src2 is |
---|
2050 | next to top of stack and the top of stack also dies. Since |
---|
2051 | we have already popped src1, "next to top of stack" is really |
---|
2052 | at top (FIRST_STACK_REG) now. */ |
---|
2053 | |
---|
2054 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG |
---|
2055 | && src1_note) |
---|
2056 | { |
---|
2057 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0))); |
---|
2058 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
---|
2059 | regstack->top--; |
---|
2060 | } |
---|
2061 | else |
---|
2062 | { |
---|
2063 | /* The 386 can only represent death of the first operand in |
---|
2064 | the case handled above. In all other cases, emit a separate |
---|
2065 | pop and remove the death note from here. */ |
---|
2066 | |
---|
2067 | link_cc0_insns (insn); |
---|
2068 | |
---|
2069 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); |
---|
2070 | |
---|
2071 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
---|
2072 | emit_insn_after); |
---|
2073 | } |
---|
2074 | } |
---|
2075 | } |
---|
2076 | |
---|
2077 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK |
---|
2078 | is the current register layout. */ |
---|
2079 | |
---|
2080 | static void |
---|
2081 | subst_stack_regs_pat (insn, regstack, pat) |
---|
2082 | rtx insn; |
---|
2083 | stack regstack; |
---|
2084 | rtx pat; |
---|
2085 | { |
---|
2086 | rtx *dest, *src; |
---|
2087 | rtx *src1 = (rtx *) NULL_PTR, *src2; |
---|
2088 | rtx src1_note, src2_note; |
---|
2089 | |
---|
2090 | if (GET_CODE (pat) != SET) |
---|
2091 | return; |
---|
2092 | |
---|
2093 | dest = get_true_reg (&SET_DEST (pat)); |
---|
2094 | src = get_true_reg (&SET_SRC (pat)); |
---|
2095 | |
---|
2096 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ |
---|
2097 | |
---|
2098 | if (*dest != cc0_rtx |
---|
2099 | && (STACK_REG_P (*src) |
---|
2100 | || (STACK_REG_P (*dest) |
---|
2101 | && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM |
---|
2102 | || GET_CODE (*src) == CONST_DOUBLE)))) |
---|
2103 | move_for_stack_reg (insn, regstack, pat); |
---|
2104 | else |
---|
2105 | switch (GET_CODE (SET_SRC (pat))) |
---|
2106 | { |
---|
2107 | case COMPARE: |
---|
2108 | compare_for_stack_reg (insn, regstack, pat); |
---|
2109 | break; |
---|
2110 | |
---|
2111 | case CALL: |
---|
2112 | { |
---|
2113 | int count; |
---|
2114 | for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); |
---|
2115 | --count >= 0;) |
---|
2116 | { |
---|
2117 | regstack->reg[++regstack->top] = REGNO (*dest) + count; |
---|
2118 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); |
---|
2119 | } |
---|
2120 | } |
---|
2121 | replace_reg (dest, FIRST_STACK_REG); |
---|
2122 | break; |
---|
2123 | |
---|
2124 | case REG: |
---|
2125 | /* This is a `tstM2' case. */ |
---|
2126 | if (*dest != cc0_rtx) |
---|
2127 | abort (); |
---|
2128 | |
---|
2129 | src1 = src; |
---|
2130 | |
---|
2131 | /* Fall through. */ |
---|
2132 | |
---|
2133 | case FLOAT_TRUNCATE: |
---|
2134 | case SQRT: |
---|
2135 | case ABS: |
---|
2136 | case NEG: |
---|
2137 | /* These insns only operate on the top of the stack. DEST might |
---|
2138 | be cc0_rtx if we're processing a tstM pattern. Also, it's |
---|
2139 | possible that the tstM case results in a REG_DEAD note on the |
---|
2140 | source. */ |
---|
2141 | |
---|
2142 | if (src1 == 0) |
---|
2143 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); |
---|
2144 | |
---|
2145 | emit_swap_insn (insn, regstack, *src1); |
---|
2146 | |
---|
2147 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
---|
2148 | |
---|
2149 | if (STACK_REG_P (*dest)) |
---|
2150 | replace_reg (dest, FIRST_STACK_REG); |
---|
2151 | |
---|
2152 | if (src1_note) |
---|
2153 | { |
---|
2154 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
---|
2155 | regstack->top--; |
---|
2156 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); |
---|
2157 | } |
---|
2158 | |
---|
2159 | replace_reg (src1, FIRST_STACK_REG); |
---|
2160 | |
---|
2161 | break; |
---|
2162 | |
---|
2163 | case MINUS: |
---|
2164 | case DIV: |
---|
2165 | /* On i386, reversed forms of subM3 and divM3 exist for |
---|
2166 | MODE_FLOAT, so the same code that works for addM3 and mulM3 |
---|
2167 | can be used. */ |
---|
2168 | case MULT: |
---|
2169 | case PLUS: |
---|
2170 | /* These insns can accept the top of stack as a destination |
---|
2171 | from a stack reg or mem, or can use the top of stack as a |
---|
2172 | source and some other stack register (possibly top of stack) |
---|
2173 | as a destination. */ |
---|
2174 | |
---|
2175 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); |
---|
2176 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); |
---|
2177 | |
---|
2178 | /* We will fix any death note later. */ |
---|
2179 | |
---|
2180 | if (STACK_REG_P (*src1)) |
---|
2181 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
---|
2182 | else |
---|
2183 | src1_note = NULL_RTX; |
---|
2184 | if (STACK_REG_P (*src2)) |
---|
2185 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); |
---|
2186 | else |
---|
2187 | src2_note = NULL_RTX; |
---|
2188 | |
---|
2189 | /* If either operand is not a stack register, then the dest |
---|
2190 | must be top of stack. */ |
---|
2191 | |
---|
2192 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
---|
2193 | emit_swap_insn (insn, regstack, *dest); |
---|
2194 | else |
---|
2195 | { |
---|
2196 | /* Both operands are REG. If neither operand is already |
---|
2197 | at the top of stack, choose to make the one that is the dest |
---|
2198 | the new top of stack. */ |
---|
2199 | |
---|
2200 | int src1_hard_regnum, src2_hard_regnum; |
---|
2201 | |
---|
2202 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
---|
2203 | src2_hard_regnum = get_hard_regnum (regstack, *src2); |
---|
2204 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) |
---|
2205 | abort (); |
---|
2206 | |
---|
2207 | if (src1_hard_regnum != FIRST_STACK_REG |
---|
2208 | && src2_hard_regnum != FIRST_STACK_REG) |
---|
2209 | emit_swap_insn (insn, regstack, *dest); |
---|
2210 | } |
---|
2211 | |
---|
2212 | if (STACK_REG_P (*src1)) |
---|
2213 | replace_reg (src1, get_hard_regnum (regstack, *src1)); |
---|
2214 | if (STACK_REG_P (*src2)) |
---|
2215 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
---|
2216 | |
---|
2217 | if (src1_note) |
---|
2218 | { |
---|
2219 | /* If the register that dies is at the top of stack, then |
---|
2220 | the destination is somewhere else - merely substitute it. |
---|
2221 | But if the reg that dies is not at top of stack, then |
---|
2222 | move the top of stack to the dead reg, as though we had |
---|
2223 | done the insn and then a store-with-pop. */ |
---|
2224 | |
---|
2225 | if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top]) |
---|
2226 | { |
---|
2227 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
---|
2228 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
---|
2229 | } |
---|
2230 | else |
---|
2231 | { |
---|
2232 | int regno = get_hard_regnum (regstack, XEXP (src1_note, 0)); |
---|
2233 | |
---|
2234 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
---|
2235 | replace_reg (dest, regno); |
---|
2236 | |
---|
2237 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] |
---|
2238 | = regstack->reg[regstack->top]; |
---|
2239 | } |
---|
2240 | |
---|
2241 | CLEAR_HARD_REG_BIT (regstack->reg_set, |
---|
2242 | REGNO (XEXP (src1_note, 0))); |
---|
2243 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
---|
2244 | regstack->top--; |
---|
2245 | } |
---|
2246 | else if (src2_note) |
---|
2247 | { |
---|
2248 | if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top]) |
---|
2249 | { |
---|
2250 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
---|
2251 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
---|
2252 | } |
---|
2253 | else |
---|
2254 | { |
---|
2255 | int regno = get_hard_regnum (regstack, XEXP (src2_note, 0)); |
---|
2256 | |
---|
2257 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
---|
2258 | replace_reg (dest, regno); |
---|
2259 | |
---|
2260 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] |
---|
2261 | = regstack->reg[regstack->top]; |
---|
2262 | } |
---|
2263 | |
---|
2264 | CLEAR_HARD_REG_BIT (regstack->reg_set, |
---|
2265 | REGNO (XEXP (src2_note, 0))); |
---|
2266 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); |
---|
2267 | regstack->top--; |
---|
2268 | } |
---|
2269 | else |
---|
2270 | { |
---|
2271 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
---|
2272 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
---|
2273 | } |
---|
2274 | |
---|
2275 | break; |
---|
2276 | |
---|
2277 | case UNSPEC: |
---|
2278 | switch (XINT (SET_SRC (pat), 1)) |
---|
2279 | { |
---|
2280 | case 1: /* sin */ |
---|
2281 | case 2: /* cos */ |
---|
2282 | /* These insns only operate on the top of the stack. */ |
---|
2283 | |
---|
2284 | src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0)); |
---|
2285 | |
---|
2286 | emit_swap_insn (insn, regstack, *src1); |
---|
2287 | |
---|
2288 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
---|
2289 | |
---|
2290 | if (STACK_REG_P (*dest)) |
---|
2291 | replace_reg (dest, FIRST_STACK_REG); |
---|
2292 | |
---|
2293 | if (src1_note) |
---|
2294 | { |
---|
2295 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
---|
2296 | regstack->top--; |
---|
2297 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); |
---|
2298 | } |
---|
2299 | |
---|
2300 | replace_reg (src1, FIRST_STACK_REG); |
---|
2301 | |
---|
2302 | break; |
---|
2303 | |
---|
2304 | default: |
---|
2305 | abort (); |
---|
2306 | } |
---|
2307 | break; |
---|
2308 | |
---|
2309 | default: |
---|
2310 | abort (); |
---|
2311 | } |
---|
2312 | } |
---|
2313 | |
---|
2314 | /* Substitute hard regnums for any stack regs in INSN, which has |
---|
2315 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info |
---|
2316 | before the insn, and is updated with changes made here. CONSTRAINTS is |
---|
2317 | an array of the constraint strings used in the asm statement. |
---|
2318 | |
---|
2319 | OPERANDS is an array of the operands, and OPERANDS_LOC is a |
---|
2320 | parallel array of where the operands were found. The output operands |
---|
2321 | all precede the input operands. |
---|
2322 | |
---|
2323 | There are several requirements and assumptions about the use of |
---|
2324 | stack-like regs in asm statements. These rules are enforced by |
---|
2325 | record_asm_stack_regs; see comments there for details. Any |
---|
2326 | asm_operands left in the RTL at this point may be assume to meet the |
---|
2327 | requirements, since record_asm_stack_regs removes any problem asm. */ |
---|
2328 | |
---|
2329 | static void |
---|
2330 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints, |
---|
2331 | n_inputs, n_outputs) |
---|
2332 | rtx insn; |
---|
2333 | stack regstack; |
---|
2334 | rtx *operands, **operands_loc; |
---|
2335 | char **constraints; |
---|
2336 | int n_inputs, n_outputs; |
---|
2337 | { |
---|
2338 | int n_operands = n_inputs + n_outputs; |
---|
2339 | int first_input = n_outputs; |
---|
2340 | rtx body = PATTERN (insn); |
---|
2341 | |
---|
2342 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); |
---|
2343 | enum reg_class *operand_class |
---|
2344 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); |
---|
2345 | |
---|
2346 | rtx *note_reg; /* Array of note contents */ |
---|
2347 | rtx **note_loc; /* Address of REG field of each note */ |
---|
2348 | enum reg_note *note_kind; /* The type of each note */ |
---|
2349 | |
---|
2350 | rtx *clobber_reg; |
---|
2351 | rtx **clobber_loc; |
---|
2352 | |
---|
2353 | struct stack_def temp_stack; |
---|
2354 | int n_notes; |
---|
2355 | int n_clobbers; |
---|
2356 | rtx note; |
---|
2357 | int i; |
---|
2358 | |
---|
2359 | /* Find out what the constraints required. If no constraint |
---|
2360 | alternative matches, that is a compiler bug: we should have caught |
---|
2361 | such an insn during the life analysis pass (and reload should have |
---|
2362 | caught it regardless). */ |
---|
2363 | |
---|
2364 | i = constrain_asm_operands (n_operands, operands, constraints, |
---|
2365 | operand_matches, operand_class); |
---|
2366 | if (i < 0) |
---|
2367 | abort (); |
---|
2368 | |
---|
2369 | /* Strip SUBREGs here to make the following code simpler. */ |
---|
2370 | for (i = 0; i < n_operands; i++) |
---|
2371 | if (GET_CODE (operands[i]) == SUBREG |
---|
2372 | && GET_CODE (SUBREG_REG (operands[i])) == REG) |
---|
2373 | { |
---|
2374 | operands_loc[i] = & SUBREG_REG (operands[i]); |
---|
2375 | operands[i] = SUBREG_REG (operands[i]); |
---|
2376 | } |
---|
2377 | |
---|
2378 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ |
---|
2379 | |
---|
2380 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
---|
2381 | i++; |
---|
2382 | |
---|
2383 | note_reg = (rtx *) alloca (i * sizeof (rtx)); |
---|
2384 | note_loc = (rtx **) alloca (i * sizeof (rtx *)); |
---|
2385 | note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); |
---|
2386 | |
---|
2387 | n_notes = 0; |
---|
2388 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
---|
2389 | { |
---|
2390 | rtx reg = XEXP (note, 0); |
---|
2391 | rtx *loc = & XEXP (note, 0); |
---|
2392 | |
---|
2393 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
---|
2394 | { |
---|
2395 | loc = & SUBREG_REG (reg); |
---|
2396 | reg = SUBREG_REG (reg); |
---|
2397 | } |
---|
2398 | |
---|
2399 | if (STACK_REG_P (reg) |
---|
2400 | && (REG_NOTE_KIND (note) == REG_DEAD |
---|
2401 | || REG_NOTE_KIND (note) == REG_UNUSED)) |
---|
2402 | { |
---|
2403 | note_reg[n_notes] = reg; |
---|
2404 | note_loc[n_notes] = loc; |
---|
2405 | note_kind[n_notes] = REG_NOTE_KIND (note); |
---|
2406 | n_notes++; |
---|
2407 | } |
---|
2408 | } |
---|
2409 | |
---|
2410 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ |
---|
2411 | |
---|
2412 | n_clobbers = 0; |
---|
2413 | |
---|
2414 | if (GET_CODE (body) == PARALLEL) |
---|
2415 | { |
---|
2416 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); |
---|
2417 | clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **)); |
---|
2418 | |
---|
2419 | for (i = 0; i < XVECLEN (body, 0); i++) |
---|
2420 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) |
---|
2421 | { |
---|
2422 | rtx clobber = XVECEXP (body, 0, i); |
---|
2423 | rtx reg = XEXP (clobber, 0); |
---|
2424 | rtx *loc = & XEXP (clobber, 0); |
---|
2425 | |
---|
2426 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
---|
2427 | { |
---|
2428 | loc = & SUBREG_REG (reg); |
---|
2429 | reg = SUBREG_REG (reg); |
---|
2430 | } |
---|
2431 | |
---|
2432 | if (STACK_REG_P (reg)) |
---|
2433 | { |
---|
2434 | clobber_reg[n_clobbers] = reg; |
---|
2435 | clobber_loc[n_clobbers] = loc; |
---|
2436 | n_clobbers++; |
---|
2437 | } |
---|
2438 | } |
---|
2439 | } |
---|
2440 | |
---|
2441 | bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack)); |
---|
2442 | |
---|
2443 | /* Put the input regs into the desired place in TEMP_STACK. */ |
---|
2444 | |
---|
2445 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
2446 | if (STACK_REG_P (operands[i]) |
---|
2447 | && reg_class_subset_p (operand_class[i], FLOAT_REGS) |
---|
2448 | && operand_class[i] != FLOAT_REGS) |
---|
2449 | { |
---|
2450 | /* If an operand needs to be in a particular reg in |
---|
2451 | FLOAT_REGS, the constraint was either 't' or 'u'. Since |
---|
2452 | these constraints are for single register classes, and reload |
---|
2453 | guaranteed that operand[i] is already in that class, we can |
---|
2454 | just use REGNO (operands[i]) to know which actual reg this |
---|
2455 | operand needs to be in. */ |
---|
2456 | |
---|
2457 | int regno = get_hard_regnum (&temp_stack, operands[i]); |
---|
2458 | |
---|
2459 | if (regno < 0) |
---|
2460 | abort (); |
---|
2461 | |
---|
2462 | if (regno != REGNO (operands[i])) |
---|
2463 | { |
---|
2464 | /* operands[i] is not in the right place. Find it |
---|
2465 | and swap it with whatever is already in I's place. |
---|
2466 | K is where operands[i] is now. J is where it should |
---|
2467 | be. */ |
---|
2468 | int j, k, temp; |
---|
2469 | |
---|
2470 | k = temp_stack.top - (regno - FIRST_STACK_REG); |
---|
2471 | j = (temp_stack.top |
---|
2472 | - (REGNO (operands[i]) - FIRST_STACK_REG)); |
---|
2473 | |
---|
2474 | temp = temp_stack.reg[k]; |
---|
2475 | temp_stack.reg[k] = temp_stack.reg[j]; |
---|
2476 | temp_stack.reg[j] = temp; |
---|
2477 | } |
---|
2478 | } |
---|
2479 | |
---|
2480 | /* emit insns before INSN to make sure the reg-stack is in the right |
---|
2481 | order. */ |
---|
2482 | |
---|
2483 | change_stack (insn, regstack, &temp_stack, emit_insn_before); |
---|
2484 | |
---|
2485 | /* Make the needed input register substitutions. Do death notes and |
---|
2486 | clobbers too, because these are for inputs, not outputs. */ |
---|
2487 | |
---|
2488 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
2489 | if (STACK_REG_P (operands[i])) |
---|
2490 | { |
---|
2491 | int regnum = get_hard_regnum (regstack, operands[i]); |
---|
2492 | |
---|
2493 | if (regnum < 0) |
---|
2494 | abort (); |
---|
2495 | |
---|
2496 | replace_reg (operands_loc[i], regnum); |
---|
2497 | } |
---|
2498 | |
---|
2499 | for (i = 0; i < n_notes; i++) |
---|
2500 | if (note_kind[i] == REG_DEAD) |
---|
2501 | { |
---|
2502 | int regnum = get_hard_regnum (regstack, note_reg[i]); |
---|
2503 | |
---|
2504 | if (regnum < 0) |
---|
2505 | abort (); |
---|
2506 | |
---|
2507 | replace_reg (note_loc[i], regnum); |
---|
2508 | } |
---|
2509 | |
---|
2510 | for (i = 0; i < n_clobbers; i++) |
---|
2511 | { |
---|
2512 | /* It's OK for a CLOBBER to reference a reg that is not live. |
---|
2513 | Don't try to replace it in that case. */ |
---|
2514 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); |
---|
2515 | |
---|
2516 | if (regnum >= 0) |
---|
2517 | { |
---|
2518 | /* Sigh - clobbers always have QImode. But replace_reg knows |
---|
2519 | that these regs can't be MODE_INT and will abort. Just put |
---|
2520 | the right reg there without calling replace_reg. */ |
---|
2521 | |
---|
2522 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
---|
2523 | } |
---|
2524 | } |
---|
2525 | |
---|
2526 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
---|
2527 | |
---|
2528 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
2529 | if (STACK_REG_P (operands[i])) |
---|
2530 | { |
---|
2531 | /* An input reg is implicitly popped if it is tied to an |
---|
2532 | output, or if there is a CLOBBER for it. */ |
---|
2533 | int j; |
---|
2534 | |
---|
2535 | for (j = 0; j < n_clobbers; j++) |
---|
2536 | if (operands_match_p (clobber_reg[j], operands[i])) |
---|
2537 | break; |
---|
2538 | |
---|
2539 | if (j < n_clobbers || operand_matches[i] >= 0) |
---|
2540 | { |
---|
2541 | /* operands[i] might not be at the top of stack. But that's OK, |
---|
2542 | because all we need to do is pop the right number of regs |
---|
2543 | off of the top of the reg-stack. record_asm_stack_regs |
---|
2544 | guaranteed that all implicitly popped regs were grouped |
---|
2545 | at the top of the reg-stack. */ |
---|
2546 | |
---|
2547 | CLEAR_HARD_REG_BIT (regstack->reg_set, |
---|
2548 | regstack->reg[regstack->top]); |
---|
2549 | regstack->top--; |
---|
2550 | } |
---|
2551 | } |
---|
2552 | |
---|
2553 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. |
---|
2554 | Note that there isn't any need to substitute register numbers. |
---|
2555 | ??? Explain why this is true. */ |
---|
2556 | |
---|
2557 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) |
---|
2558 | { |
---|
2559 | /* See if there is an output for this hard reg. */ |
---|
2560 | int j; |
---|
2561 | |
---|
2562 | for (j = 0; j < n_outputs; j++) |
---|
2563 | if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i) |
---|
2564 | { |
---|
2565 | regstack->reg[++regstack->top] = i; |
---|
2566 | SET_HARD_REG_BIT (regstack->reg_set, i); |
---|
2567 | break; |
---|
2568 | } |
---|
2569 | } |
---|
2570 | |
---|
2571 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD |
---|
2572 | input that the asm didn't implicitly pop. If the asm didn't |
---|
2573 | implicitly pop an input reg, that reg will still be live. |
---|
2574 | |
---|
2575 | Note that we can't use find_regno_note here: the register numbers |
---|
2576 | in the death notes have already been substituted. */ |
---|
2577 | |
---|
2578 | for (i = 0; i < n_outputs; i++) |
---|
2579 | if (STACK_REG_P (operands[i])) |
---|
2580 | { |
---|
2581 | int j; |
---|
2582 | |
---|
2583 | for (j = 0; j < n_notes; j++) |
---|
2584 | if (REGNO (operands[i]) == REGNO (note_reg[j]) |
---|
2585 | && note_kind[j] == REG_UNUSED) |
---|
2586 | { |
---|
2587 | insn = emit_pop_insn (insn, regstack, operands[i], |
---|
2588 | emit_insn_after); |
---|
2589 | break; |
---|
2590 | } |
---|
2591 | } |
---|
2592 | |
---|
2593 | for (i = first_input; i < first_input + n_inputs; i++) |
---|
2594 | if (STACK_REG_P (operands[i])) |
---|
2595 | { |
---|
2596 | int j; |
---|
2597 | |
---|
2598 | for (j = 0; j < n_notes; j++) |
---|
2599 | if (REGNO (operands[i]) == REGNO (note_reg[j]) |
---|
2600 | && note_kind[j] == REG_DEAD |
---|
2601 | && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))) |
---|
2602 | { |
---|
2603 | insn = emit_pop_insn (insn, regstack, operands[i], |
---|
2604 | emit_insn_after); |
---|
2605 | break; |
---|
2606 | } |
---|
2607 | } |
---|
2608 | } |
---|
2609 | |
---|
2610 | /* Substitute stack hard reg numbers for stack virtual registers in |
---|
2611 | INSN. Non-stack register numbers are not changed. REGSTACK is the |
---|
2612 | current stack content. Insns may be emitted as needed to arrange the |
---|
2613 | stack for the 387 based on the contents of the insn. */ |
---|
2614 | |
---|
2615 | static void |
---|
2616 | subst_stack_regs (insn, regstack) |
---|
2617 | rtx insn; |
---|
2618 | stack regstack; |
---|
2619 | { |
---|
2620 | register rtx *note_link, note; |
---|
2621 | register int i; |
---|
2622 | int n_operands; |
---|
2623 | |
---|
2624 | if (GET_CODE (insn) == CALL_INSN) |
---|
2625 | { |
---|
2626 | int top = regstack->top; |
---|
2627 | |
---|
2628 | /* If there are any floating point parameters to be passed in |
---|
2629 | registers for this call, make sure they are in the right |
---|
2630 | order. */ |
---|
2631 | |
---|
2632 | if (top >= 0) |
---|
2633 | { |
---|
2634 | straighten_stack (PREV_INSN (insn), regstack); |
---|
2635 | |
---|
2636 | /* Now mark the arguments as dead after the call. */ |
---|
2637 | |
---|
2638 | while (regstack->top >= 0) |
---|
2639 | { |
---|
2640 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); |
---|
2641 | regstack->top--; |
---|
2642 | } |
---|
2643 | } |
---|
2644 | } |
---|
2645 | |
---|
2646 | /* Do the actual substitution if any stack regs are mentioned. |
---|
2647 | Since we only record whether entire insn mentions stack regs, and |
---|
2648 | subst_stack_regs_pat only works for patterns that contain stack regs, |
---|
2649 | we must check each pattern in a parallel here. A call_value_pop could |
---|
2650 | fail otherwise. */ |
---|
2651 | |
---|
2652 | if (GET_MODE (insn) == QImode) |
---|
2653 | { |
---|
2654 | n_operands = asm_noperands (PATTERN (insn)); |
---|
2655 | if (n_operands >= 0) |
---|
2656 | { |
---|
2657 | /* This insn is an `asm' with operands. Decode the operands, |
---|
2658 | decide how many are inputs, and do register substitution. |
---|
2659 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
---|
2660 | |
---|
2661 | rtx operands[MAX_RECOG_OPERANDS]; |
---|
2662 | rtx *operands_loc[MAX_RECOG_OPERANDS]; |
---|
2663 | rtx body = PATTERN (insn); |
---|
2664 | int n_inputs, n_outputs; |
---|
2665 | char **constraints |
---|
2666 | = (char **) alloca (n_operands * sizeof (char *)); |
---|
2667 | |
---|
2668 | decode_asm_operands (body, operands, operands_loc, |
---|
2669 | constraints, NULL_PTR); |
---|
2670 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); |
---|
2671 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, |
---|
2672 | constraints, n_inputs, n_outputs); |
---|
2673 | return; |
---|
2674 | } |
---|
2675 | |
---|
2676 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
---|
2677 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
---|
2678 | { |
---|
2679 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) |
---|
2680 | subst_stack_regs_pat (insn, regstack, |
---|
2681 | XVECEXP (PATTERN (insn), 0, i)); |
---|
2682 | } |
---|
2683 | else |
---|
2684 | subst_stack_regs_pat (insn, regstack, PATTERN (insn)); |
---|
2685 | } |
---|
2686 | |
---|
2687 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any |
---|
2688 | REG_UNUSED will already have been dealt with, so just return. */ |
---|
2689 | |
---|
2690 | if (GET_CODE (insn) == NOTE) |
---|
2691 | return; |
---|
2692 | |
---|
2693 | /* If there is a REG_UNUSED note on a stack register on this insn, |
---|
2694 | the indicated reg must be popped. The REG_UNUSED note is removed, |
---|
2695 | since the form of the newly emitted pop insn references the reg, |
---|
2696 | making it no longer `unset'. */ |
---|
2697 | |
---|
2698 | note_link = ®_NOTES(insn); |
---|
2699 | for (note = *note_link; note; note = XEXP (note, 1)) |
---|
2700 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) |
---|
2701 | { |
---|
2702 | *note_link = XEXP (note, 1); |
---|
2703 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after); |
---|
2704 | } |
---|
2705 | else |
---|
2706 | note_link = &XEXP (note, 1); |
---|
2707 | } |
---|
2708 | |
---|
2709 | /* Change the organization of the stack so that it fits a new basic |
---|
2710 | block. Some registers might have to be popped, but there can never be |
---|
2711 | a register live in the new block that is not now live. |
---|
2712 | |
---|
2713 | Insert any needed insns before or after INSN. WHEN is emit_insn_before |
---|
2714 | or emit_insn_after. OLD is the original stack layout, and NEW is |
---|
2715 | the desired form. OLD is updated to reflect the code emitted, ie, it |
---|
2716 | will be the same as NEW upon return. |
---|
2717 | |
---|
2718 | This function will not preserve block_end[]. But that information |
---|
2719 | is no longer needed once this has executed. */ |
---|
2720 | |
---|
2721 | static void |
---|
2722 | change_stack (insn, old, new, when) |
---|
2723 | rtx insn; |
---|
2724 | stack old; |
---|
2725 | stack new; |
---|
2726 | rtx (*when)(); |
---|
2727 | { |
---|
2728 | int reg; |
---|
2729 | |
---|
2730 | /* We will be inserting new insns "backwards", by calling emit_insn_before. |
---|
2731 | If we are to insert after INSN, find the next insn, and insert before |
---|
2732 | it. */ |
---|
2733 | |
---|
2734 | if (when == emit_insn_after) |
---|
2735 | insn = NEXT_INSN (insn); |
---|
2736 | |
---|
2737 | /* Pop any registers that are not needed in the new block. */ |
---|
2738 | |
---|
2739 | for (reg = old->top; reg >= 0; reg--) |
---|
2740 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) |
---|
2741 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), |
---|
2742 | emit_insn_before); |
---|
2743 | |
---|
2744 | if (new->top == -2) |
---|
2745 | { |
---|
2746 | /* If the new block has never been processed, then it can inherit |
---|
2747 | the old stack order. */ |
---|
2748 | |
---|
2749 | new->top = old->top; |
---|
2750 | bcopy (old->reg, new->reg, sizeof (new->reg)); |
---|
2751 | } |
---|
2752 | else |
---|
2753 | { |
---|
2754 | /* This block has been entered before, and we must match the |
---|
2755 | previously selected stack order. */ |
---|
2756 | |
---|
2757 | /* By now, the only difference should be the order of the stack, |
---|
2758 | not their depth or liveliness. */ |
---|
2759 | |
---|
2760 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); |
---|
2761 | |
---|
2762 | abort (); |
---|
2763 | |
---|
2764 | win: |
---|
2765 | |
---|
2766 | if (old->top != new->top) |
---|
2767 | abort (); |
---|
2768 | |
---|
2769 | /* Loop here emitting swaps until the stack is correct. The |
---|
2770 | worst case number of swaps emitted is N + 2, where N is the |
---|
2771 | depth of the stack. In some cases, the reg at the top of |
---|
2772 | stack may be correct, but swapped anyway in order to fix |
---|
2773 | other regs. But since we never swap any other reg away from |
---|
2774 | its correct slot, this algorithm will converge. */ |
---|
2775 | |
---|
2776 | do |
---|
2777 | { |
---|
2778 | /* Swap the reg at top of stack into the position it is |
---|
2779 | supposed to be in, until the correct top of stack appears. */ |
---|
2780 | |
---|
2781 | while (old->reg[old->top] != new->reg[new->top]) |
---|
2782 | { |
---|
2783 | for (reg = new->top; reg >= 0; reg--) |
---|
2784 | if (new->reg[reg] == old->reg[old->top]) |
---|
2785 | break; |
---|
2786 | |
---|
2787 | if (reg == -1) |
---|
2788 | abort (); |
---|
2789 | |
---|
2790 | emit_swap_insn (insn, old, |
---|
2791 | FP_MODE_REG (old->reg[reg], DFmode)); |
---|
2792 | } |
---|
2793 | |
---|
2794 | /* See if any regs remain incorrect. If so, bring an |
---|
2795 | incorrect reg to the top of stack, and let the while loop |
---|
2796 | above fix it. */ |
---|
2797 | |
---|
2798 | for (reg = new->top; reg >= 0; reg--) |
---|
2799 | if (new->reg[reg] != old->reg[reg]) |
---|
2800 | { |
---|
2801 | emit_swap_insn (insn, old, |
---|
2802 | FP_MODE_REG (old->reg[reg], DFmode)); |
---|
2803 | break; |
---|
2804 | } |
---|
2805 | } while (reg >= 0); |
---|
2806 | |
---|
2807 | /* At this point there must be no differences. */ |
---|
2808 | |
---|
2809 | for (reg = old->top; reg >= 0; reg--) |
---|
2810 | if (old->reg[reg] != new->reg[reg]) |
---|
2811 | abort (); |
---|
2812 | } |
---|
2813 | } |
---|
2814 | |
---|
2815 | /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is |
---|
2816 | found, ensure that a jump from INSN to the code_label to which the |
---|
2817 | label_ref points ends up with the same stack as that at the |
---|
2818 | code_label. Do this by inserting insns just before the code_label to |
---|
2819 | pop and rotate the stack until it is in the correct order. REGSTACK |
---|
2820 | is the order of the register stack in INSN. |
---|
2821 | |
---|
2822 | Any code that is emitted here must not be later processed as part |
---|
2823 | of any block, as it will already contain hard register numbers. */ |
---|
2824 | |
---|
2825 | static void |
---|
2826 | goto_block_pat (insn, regstack, pat) |
---|
2827 | rtx insn; |
---|
2828 | stack regstack; |
---|
2829 | rtx pat; |
---|
2830 | { |
---|
2831 | rtx label; |
---|
2832 | rtx new_jump, new_label, new_barrier; |
---|
2833 | rtx *ref; |
---|
2834 | stack label_stack; |
---|
2835 | struct stack_def temp_stack; |
---|
2836 | int reg; |
---|
2837 | |
---|
2838 | switch (GET_CODE (pat)) |
---|
2839 | { |
---|
2840 | case RETURN: |
---|
2841 | straighten_stack (PREV_INSN (insn), regstack); |
---|
2842 | return; |
---|
2843 | default: |
---|
2844 | { |
---|
2845 | int i, j; |
---|
2846 | char *fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
---|
2847 | |
---|
2848 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) |
---|
2849 | { |
---|
2850 | if (fmt[i] == 'e') |
---|
2851 | goto_block_pat (insn, regstack, XEXP (pat, i)); |
---|
2852 | if (fmt[i] == 'E') |
---|
2853 | for (j = 0; j < XVECLEN (pat, i); j++) |
---|
2854 | goto_block_pat (insn, regstack, XVECEXP (pat, i, j)); |
---|
2855 | } |
---|
2856 | return; |
---|
2857 | } |
---|
2858 | case LABEL_REF:; |
---|
2859 | } |
---|
2860 | |
---|
2861 | label = XEXP (pat, 0); |
---|
2862 | if (GET_CODE (label) != CODE_LABEL) |
---|
2863 | abort (); |
---|
2864 | |
---|
2865 | /* First, see if in fact anything needs to be done to the stack at all. */ |
---|
2866 | if (INSN_UID (label) <= 0) |
---|
2867 | return; |
---|
2868 | |
---|
2869 | label_stack = &block_stack_in[BLOCK_NUM (label)]; |
---|
2870 | |
---|
2871 | if (label_stack->top == -2) |
---|
2872 | { |
---|
2873 | /* If the target block hasn't had a stack order selected, then |
---|
2874 | we need merely ensure that no pops are needed. */ |
---|
2875 | |
---|
2876 | for (reg = regstack->top; reg >= 0; reg--) |
---|
2877 | if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg])) |
---|
2878 | break; |
---|
2879 | |
---|
2880 | if (reg == -1) |
---|
2881 | { |
---|
2882 | /* change_stack will not emit any code in this case. */ |
---|
2883 | |
---|
2884 | change_stack (label, regstack, label_stack, emit_insn_after); |
---|
2885 | return; |
---|
2886 | } |
---|
2887 | } |
---|
2888 | else if (label_stack->top == regstack->top) |
---|
2889 | { |
---|
2890 | for (reg = label_stack->top; reg >= 0; reg--) |
---|
2891 | if (label_stack->reg[reg] != regstack->reg[reg]) |
---|
2892 | break; |
---|
2893 | |
---|
2894 | if (reg == -1) |
---|
2895 | return; |
---|
2896 | } |
---|
2897 | |
---|
2898 | /* At least one insn will need to be inserted before label. Insert |
---|
2899 | a jump around the code we are about to emit. Emit a label for the new |
---|
2900 | code, and point the original insn at this new label. We can't use |
---|
2901 | redirect_jump here, because we're using fld[4] of the code labels as |
---|
2902 | LABEL_REF chains, no NUSES counters. */ |
---|
2903 | |
---|
2904 | new_jump = emit_jump_insn_before (gen_jump (label), label); |
---|
2905 | record_label_references (new_jump, PATTERN (new_jump)); |
---|
2906 | JUMP_LABEL (new_jump) = label; |
---|
2907 | |
---|
2908 | new_barrier = emit_barrier_after (new_jump); |
---|
2909 | |
---|
2910 | new_label = gen_label_rtx (); |
---|
2911 | emit_label_after (new_label, new_barrier); |
---|
2912 | LABEL_REFS (new_label) = new_label; |
---|
2913 | |
---|
2914 | /* The old label_ref will no longer point to the code_label if now uses, |
---|
2915 | so strip the label_ref from the code_label's chain of references. */ |
---|
2916 | |
---|
2917 | for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref)) |
---|
2918 | if (*ref == pat) |
---|
2919 | break; |
---|
2920 | |
---|
2921 | if (*ref == label) |
---|
2922 | abort (); |
---|
2923 | |
---|
2924 | *ref = LABEL_NEXTREF (*ref); |
---|
2925 | |
---|
2926 | XEXP (pat, 0) = new_label; |
---|
2927 | record_label_references (insn, PATTERN (insn)); |
---|
2928 | |
---|
2929 | if (JUMP_LABEL (insn) == label) |
---|
2930 | JUMP_LABEL (insn) = new_label; |
---|
2931 | |
---|
2932 | /* Now emit the needed code. */ |
---|
2933 | |
---|
2934 | temp_stack = *regstack; |
---|
2935 | |
---|
2936 | change_stack (new_label, &temp_stack, label_stack, emit_insn_after); |
---|
2937 | } |
---|
2938 | |
---|
2939 | /* Traverse all basic blocks in a function, converting the register |
---|
2940 | references in each insn from the "flat" register file that gcc uses, to |
---|
2941 | the stack-like registers the 387 uses. */ |
---|
2942 | |
---|
2943 | static void |
---|
2944 | convert_regs () |
---|
2945 | { |
---|
2946 | register int block, reg; |
---|
2947 | register rtx insn, next; |
---|
2948 | struct stack_def regstack; |
---|
2949 | |
---|
2950 | for (block = 0; block < blocks; block++) |
---|
2951 | { |
---|
2952 | if (block_stack_in[block].top == -2) |
---|
2953 | { |
---|
2954 | /* This block has not been previously encountered. Choose a |
---|
2955 | default mapping for any stack regs live on entry */ |
---|
2956 | |
---|
2957 | block_stack_in[block].top = -1; |
---|
2958 | |
---|
2959 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) |
---|
2960 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg)) |
---|
2961 | block_stack_in[block].reg[++block_stack_in[block].top] = reg; |
---|
2962 | } |
---|
2963 | |
---|
2964 | /* Process all insns in this block. Keep track of `next' here, |
---|
2965 | so that we don't process any insns emitted while making |
---|
2966 | substitutions in INSN. */ |
---|
2967 | |
---|
2968 | next = block_begin[block]; |
---|
2969 | regstack = block_stack_in[block]; |
---|
2970 | do |
---|
2971 | { |
---|
2972 | insn = next; |
---|
2973 | next = NEXT_INSN (insn); |
---|
2974 | |
---|
2975 | /* Don't bother processing unless there is a stack reg |
---|
2976 | mentioned or if it's a CALL_INSN (register passing of |
---|
2977 | floating point values). */ |
---|
2978 | |
---|
2979 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) |
---|
2980 | subst_stack_regs (insn, ®stack); |
---|
2981 | |
---|
2982 | } while (insn != block_end[block]); |
---|
2983 | |
---|
2984 | /* Something failed if the stack life doesn't match. */ |
---|
2985 | |
---|
2986 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win); |
---|
2987 | |
---|
2988 | abort (); |
---|
2989 | |
---|
2990 | win: |
---|
2991 | |
---|
2992 | /* Adjust the stack of this block on exit to match the stack of |
---|
2993 | the target block, or copy stack information into stack of |
---|
2994 | jump target if the target block's stack order hasn't been set |
---|
2995 | yet. */ |
---|
2996 | |
---|
2997 | if (GET_CODE (insn) == JUMP_INSN) |
---|
2998 | goto_block_pat (insn, ®stack, PATTERN (insn)); |
---|
2999 | |
---|
3000 | /* Likewise handle the case where we fall into the next block. */ |
---|
3001 | |
---|
3002 | if ((block < blocks - 1) && block_drops_in[block+1]) |
---|
3003 | change_stack (insn, ®stack, &block_stack_in[block+1], |
---|
3004 | emit_insn_after); |
---|
3005 | } |
---|
3006 | |
---|
3007 | /* If the last basic block is the end of a loop, and that loop has |
---|
3008 | regs live at its start, then the last basic block will have regs live |
---|
3009 | at its end that need to be popped before the function returns. */ |
---|
3010 | |
---|
3011 | { |
---|
3012 | int value_reg_low, value_reg_high; |
---|
3013 | value_reg_low = value_reg_high = -1; |
---|
3014 | { |
---|
3015 | rtx retvalue; |
---|
3016 | if (retvalue = stack_result (current_function_decl)) |
---|
3017 | { |
---|
3018 | value_reg_low = REGNO (retvalue); |
---|
3019 | value_reg_high = value_reg_low + |
---|
3020 | HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; |
---|
3021 | } |
---|
3022 | |
---|
3023 | } |
---|
3024 | for (reg = regstack.top; reg >= 0; reg--) |
---|
3025 | if (regstack.reg[reg] < value_reg_low || |
---|
3026 | regstack.reg[reg] > value_reg_high) |
---|
3027 | insn = emit_pop_insn (insn, ®stack, |
---|
3028 | FP_MODE_REG (regstack.reg[reg], DFmode), |
---|
3029 | emit_insn_after); |
---|
3030 | } |
---|
3031 | straighten_stack (insn, ®stack); |
---|
3032 | } |
---|
3033 | |
---|
3034 | /* Check expression PAT, which is in INSN, for label references. if |
---|
3035 | one is found, print the block number of destination to FILE. */ |
---|
3036 | |
---|
3037 | static void |
---|
3038 | print_blocks (file, insn, pat) |
---|
3039 | FILE *file; |
---|
3040 | rtx insn, pat; |
---|
3041 | { |
---|
3042 | register RTX_CODE code = GET_CODE (pat); |
---|
3043 | register int i; |
---|
3044 | register char *fmt; |
---|
3045 | |
---|
3046 | if (code == LABEL_REF) |
---|
3047 | { |
---|
3048 | register rtx label = XEXP (pat, 0); |
---|
3049 | |
---|
3050 | if (GET_CODE (label) != CODE_LABEL) |
---|
3051 | abort (); |
---|
3052 | |
---|
3053 | fprintf (file, " %d", BLOCK_NUM (label)); |
---|
3054 | |
---|
3055 | return; |
---|
3056 | } |
---|
3057 | |
---|
3058 | fmt = GET_RTX_FORMAT (code); |
---|
3059 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
3060 | { |
---|
3061 | if (fmt[i] == 'e') |
---|
3062 | print_blocks (file, insn, XEXP (pat, i)); |
---|
3063 | if (fmt[i] == 'E') |
---|
3064 | { |
---|
3065 | register int j; |
---|
3066 | for (j = 0; j < XVECLEN (pat, i); j++) |
---|
3067 | print_blocks (file, insn, XVECEXP (pat, i, j)); |
---|
3068 | } |
---|
3069 | } |
---|
3070 | } |
---|
3071 | |
---|
3072 | /* Write information about stack registers and stack blocks into FILE. |
---|
3073 | This is part of making a debugging dump. */ |
---|
3074 | static void |
---|
3075 | dump_stack_info (file) |
---|
3076 | FILE *file; |
---|
3077 | { |
---|
3078 | register int block; |
---|
3079 | |
---|
3080 | fprintf (file, "\n%d stack blocks.\n", blocks); |
---|
3081 | for (block = 0; block < blocks; block++) |
---|
3082 | { |
---|
3083 | register rtx head, jump, end; |
---|
3084 | register int regno; |
---|
3085 | |
---|
3086 | fprintf (file, "\nStack block %d: first insn %d, last %d.\n", |
---|
3087 | block, INSN_UID (block_begin[block]), |
---|
3088 | INSN_UID (block_end[block])); |
---|
3089 | |
---|
3090 | head = block_begin[block]; |
---|
3091 | |
---|
3092 | fprintf (file, "Reached from blocks: "); |
---|
3093 | if (GET_CODE (head) == CODE_LABEL) |
---|
3094 | for (jump = LABEL_REFS (head); |
---|
3095 | jump != head; |
---|
3096 | jump = LABEL_NEXTREF (jump)) |
---|
3097 | { |
---|
3098 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); |
---|
3099 | fprintf (file, " %d", from_block); |
---|
3100 | } |
---|
3101 | if (block_drops_in[block]) |
---|
3102 | fprintf (file, " previous"); |
---|
3103 | |
---|
3104 | fprintf (file, "\nlive stack registers on block entry: "); |
---|
3105 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
---|
3106 | { |
---|
3107 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno)) |
---|
3108 | fprintf (file, "%d ", regno); |
---|
3109 | } |
---|
3110 | |
---|
3111 | fprintf (file, "\nlive stack registers on block exit: "); |
---|
3112 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
---|
3113 | { |
---|
3114 | if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno)) |
---|
3115 | fprintf (file, "%d ", regno); |
---|
3116 | } |
---|
3117 | |
---|
3118 | end = block_end[block]; |
---|
3119 | |
---|
3120 | fprintf (file, "\nJumps to blocks: "); |
---|
3121 | if (GET_CODE (end) == JUMP_INSN) |
---|
3122 | print_blocks (file, end, PATTERN (end)); |
---|
3123 | |
---|
3124 | if (block + 1 < blocks && block_drops_in[block+1]) |
---|
3125 | fprintf (file, " next"); |
---|
3126 | else if (block + 1 == blocks |
---|
3127 | || (GET_CODE (end) == JUMP_INSN |
---|
3128 | && GET_CODE (PATTERN (end)) == RETURN)) |
---|
3129 | fprintf (file, " return"); |
---|
3130 | |
---|
3131 | fprintf (file, "\n"); |
---|
3132 | } |
---|
3133 | } |
---|
3134 | #endif /* STACK_REGS */ |
---|