1 | /* This file contains the definitions and documentation for the |
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2 | Register Transfer Expressions (rtx's) that make up the |
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3 | Register Transfer Language (rtl) used in the Back End of the GNU compiler. |
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4 | Copyright (C) 1987, 88, 92, 94, 95, 1997 Free Software Foundation, Inc. |
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5 | |
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6 | This file is part of GNU CC. |
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7 | |
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8 | GNU CC is free software; you can redistribute it and/or modify |
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9 | it under the terms of the GNU General Public License as published by |
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10 | the Free Software Foundation; either version 2, or (at your option) |
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11 | any later version. |
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12 | |
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13 | GNU CC is distributed in the hope that it will be useful, |
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14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | GNU General Public License for more details. |
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17 | |
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18 | You should have received a copy of the GNU General Public License |
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19 | along with GNU CC; see the file COPYING. If not, write to |
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20 | the Free Software Foundation, 59 Temple Place - Suite 330, |
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21 | Boston, MA 02111-1307, USA. */ |
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22 | |
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23 | |
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24 | /* Expression definitions and descriptions for all targets are in this file. |
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25 | Some will not be used for some targets. |
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26 | |
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27 | The fields in the cpp macro call "DEF_RTL_EXPR()" |
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28 | are used to create declarations in the C source of the compiler. |
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29 | |
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30 | The fields are: |
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31 | |
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32 | 1. The internal name of the rtx used in the C source. |
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33 | It is a tag in the enumeration "enum rtx_code" defined in "rtl.h". |
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34 | By convention these are in UPPER_CASE. |
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35 | |
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36 | 2. The name of the rtx in the external ASCII format read by |
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37 | read_rtx(), and printed by print_rtx(). |
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38 | These names are stored in rtx_name[]. |
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39 | By convention these are the internal (field 1) names in lower_case. |
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40 | |
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41 | 3. The print format, and type of each rtx->fld[] (field) in this rtx. |
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42 | These formats are stored in rtx_format[]. |
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43 | The meaning of the formats is documented in front of this array in rtl.c |
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44 | |
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45 | 4. The class of the rtx. These are stored in rtx_class and are accessed |
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46 | via the GET_RTX_CLASS macro. They are defined as follows: |
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47 | |
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48 | "o" an rtx code that can be used to represent an object (e.g, REG, MEM) |
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49 | "<" an rtx code for a comparison (e.g, EQ, NE, LT) |
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50 | "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT) |
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51 | "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT) |
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52 | "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE) |
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53 | "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV) |
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54 | "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT) |
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55 | "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) |
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56 | "m" an rtx code for something that matches in insns (e.g, MATCH_DUP) |
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57 | "x" everything else |
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58 | |
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59 | */ |
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60 | |
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61 | /* --------------------------------------------------------------------- |
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62 | Expressions (and "meta" expressions) used for structuring the |
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63 | rtl representation of a program. |
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64 | --------------------------------------------------------------------- */ |
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65 | |
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66 | /* an expression code name unknown to the reader */ |
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67 | DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x') |
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68 | |
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69 | /* (NIL) is used by rtl reader and printer to represent a null pointer. */ |
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70 | |
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71 | DEF_RTL_EXPR(NIL, "nil", "*", 'x') |
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72 | |
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73 | /* --------------------------------------------------------------------- |
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74 | Expressions used in constructing lists. |
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75 | --------------------------------------------------------------------- */ |
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76 | |
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77 | /* a linked list of expressions */ |
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78 | DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x') |
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79 | |
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80 | /* a linked list of instructions. |
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81 | The insns are represented in print by their uids. */ |
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82 | DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x') |
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83 | |
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84 | /* ---------------------------------------------------------------------- |
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85 | Expression types for machine descriptions. |
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86 | These do not appear in actual rtl code in the compiler. |
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87 | ---------------------------------------------------------------------- */ |
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88 | |
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89 | /* Appears only in machine descriptions. |
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90 | Means use the function named by the second arg (the string) |
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91 | as a predicate; if matched, store the structure that was matched |
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92 | in the operand table at index specified by the first arg (the integer). |
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93 | If the second arg is the null string, the structure is just stored. |
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94 | |
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95 | A third string argument indicates to the register allocator restrictions |
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96 | on where the operand can be allocated. |
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97 | |
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98 | If the target needs no restriction on any instruction this field should |
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99 | be the null string. |
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100 | |
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101 | The string is prepended by: |
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102 | '=' to indicate the operand is only written to. |
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103 | '+' to indicate the operand is both read and written to. |
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104 | |
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105 | Each character in the string represents an allocable class for an operand. |
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106 | 'g' indicates the operand can be any valid class. |
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107 | 'i' indicates the operand can be immediate (in the instruction) data. |
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108 | 'r' indicates the operand can be in a register. |
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109 | 'm' indicates the operand can be in memory. |
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110 | 'o' a subset of the 'm' class. Those memory addressing modes that |
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111 | can be offset at compile time (have a constant added to them). |
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112 | |
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113 | Other characters indicate target dependent operand classes and |
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114 | are described in each target's machine description. |
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115 | |
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116 | For instructions with more than one operand, sets of classes can be |
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117 | separated by a comma to indicate the appropriate multi-operand constraints. |
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118 | There must be a 1 to 1 correspondence between these sets of classes in |
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119 | all operands for an instruction. |
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120 | */ |
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121 | DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm') |
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122 | |
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123 | /* Appears only in machine descriptions. |
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124 | Means match a SCRATCH or a register. When used to generate rtl, a |
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125 | SCRATCH is generated. As for MATCH_OPERAND, the mode specifies |
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126 | the desired mode and the first argument is the operand number. |
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127 | The second argument is the constraint. */ |
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128 | DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm') |
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129 | |
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130 | /* Appears only in machine descriptions. |
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131 | Means match only something equal to what is stored in the operand table |
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132 | at the index specified by the argument. */ |
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133 | DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm') |
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134 | |
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135 | /* Appears only in machine descriptions. |
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136 | Means apply a predicate, AND match recursively the operands of the rtx. |
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137 | Operand 0 is the operand-number, as in match_operand. |
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138 | Operand 1 is a predicate to apply (as a string, a function name). |
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139 | Operand 2 is a vector of expressions, each of which must match |
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140 | one subexpression of the rtx this construct is matching. */ |
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141 | DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm') |
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142 | |
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143 | /* Appears only in machine descriptions. |
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144 | Means to match a PARALLEL of arbitrary length. The predicate is applied |
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145 | to the PARALLEL and the initial expressions in the PARALLEL are matched. |
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146 | Operand 0 is the operand-number, as in match_operand. |
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147 | Operand 1 is a predicate to apply to the PARALLEL. |
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148 | Operand 2 is a vector of expressions, each of which must match the |
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149 | corresponding element in the PARALLEL. */ |
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150 | DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm') |
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151 | |
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152 | /* Appears only in machine descriptions. |
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153 | Means match only something equal to what is stored in the operand table |
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154 | at the index specified by the argument. For MATCH_OPERATOR. */ |
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155 | DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm') |
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156 | |
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157 | /* Appears only in machine descriptions. |
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158 | Means match only something equal to what is stored in the operand table |
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159 | at the index specified by the argument. For MATCH_PARALLEL. */ |
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160 | DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm') |
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161 | |
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162 | /* Appears only in machine descriptions. |
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163 | Defines the pattern for one kind of instruction. |
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164 | Operand: |
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165 | 0: names this instruction. |
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166 | If the name is the null string, the instruction is in the |
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167 | machine description just to be recognized, and will never be emitted by |
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168 | the tree to rtl expander. |
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169 | 1: is the pattern. |
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170 | 2: is a string which is a C expression |
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171 | giving an additional condition for recognizing this pattern. |
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172 | A null string means no extra condition. |
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173 | 3: is the action to execute if this pattern is matched. |
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174 | If this assembler code template starts with a * then it is a fragment of |
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175 | C code to run to decide on a template to use. Otherwise, it is the |
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176 | template to use. |
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177 | 4: optionally, a vector of attributes for this insn. |
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178 | */ |
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179 | DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x') |
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180 | |
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181 | /* Definition of a peephole optimization. |
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182 | 1st operand: vector of insn patterns to match |
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183 | 2nd operand: C expression that must be true |
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184 | 3rd operand: template or C code to produce assembler output. |
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185 | 4: optionally, a vector of attributes for this insn. |
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186 | */ |
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187 | DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x') |
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188 | |
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189 | /* Definition of a split operation. |
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190 | 1st operand: insn pattern to match |
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191 | 2nd operand: C expression that must be true |
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192 | 3rd operand: vector of insn patterns to place into a SEQUENCE |
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193 | 4th operand: optionally, some C code to execute before generating the |
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194 | insns. This might, for example, create some RTX's and store them in |
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195 | elements of `recog_operand' for use by the vector of insn-patterns. |
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196 | (`operands' is an alias here for `recog_operand'). */ |
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197 | DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x') |
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198 | |
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199 | /* Definition of a combiner pattern. |
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200 | Operands not defined yet. */ |
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201 | DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x') |
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202 | |
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203 | /* Define how to generate multiple insns for a standard insn name. |
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204 | 1st operand: the insn name. |
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205 | 2nd operand: vector of insn-patterns. |
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206 | Use match_operand to substitute an element of `recog_operand'. |
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207 | 3rd operand: C expression that must be true for this to be available. |
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208 | This may not test any operands. |
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209 | 4th operand: Extra C code to execute before generating the insns. |
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210 | This might, for example, create some RTX's and store them in |
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211 | elements of `recog_operand' for use by the vector of insn-patterns. |
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212 | (`operands' is an alias here for `recog_operand'). */ |
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213 | DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x') |
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214 | |
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215 | /* Define a requirement for delay slots. |
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216 | 1st operand: Condition involving insn attributes that, if true, |
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217 | indicates that the insn requires the number of delay slots |
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218 | shown. |
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219 | 2nd operand: Vector whose length is the three times the number of delay |
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220 | slots required. |
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221 | Each entry gives three conditions, each involving attributes. |
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222 | The first must be true for an insn to occupy that delay slot |
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223 | location. The second is true for all insns that can be |
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224 | annulled if the branch is true and the third is true for all |
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225 | insns that can be annulled if the branch is false. |
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226 | |
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227 | Multiple DEFINE_DELAYs may be present. They indicate differing |
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228 | requirements for delay slots. */ |
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229 | DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x') |
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230 | |
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231 | /* Define a set of insns that requires a function unit. This means that |
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232 | these insns produce their result after a delay and that there may be |
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233 | restrictions on the number of insns of this type that can be scheduled |
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234 | simultaneously. |
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235 | |
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236 | More than one DEFINE_FUNCTION_UNIT can be specified for a function unit. |
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237 | Each gives a set of operations and associated delays. The first three |
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238 | operands must be the same for each operation for the same function unit. |
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239 | |
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240 | All delays are specified in cycles. |
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241 | |
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242 | 1st operand: Name of function unit (mostly for documentation) |
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243 | 2nd operand: Number of identical function units in CPU |
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244 | 3rd operand: Total number of simultaneous insns that can execute on this |
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245 | function unit; 0 if unlimited. |
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246 | 4th operand: Condition involving insn attribute, that, if true, specifies |
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247 | those insns that this expression applies to. |
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248 | 5th operand: Constant delay after which insn result will be |
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249 | available. |
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250 | 6th operand: Delay until next insn can be scheduled on the function unit |
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251 | executing this operation. The meaning depends on whether or |
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252 | not the next operand is supplied. |
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253 | 7th operand: If this operand is not specified, the 6th operand gives the |
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254 | number of cycles after the instruction matching the 4th |
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255 | operand begins using the function unit until a subsequent |
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256 | insn can begin. A value of zero should be used for a |
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257 | unit with no issue constraints. If only one operation can |
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258 | be executed a time and the unit is busy for the entire time, |
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259 | the 3rd operand should be specified as 1, the 6th operand |
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260 | should be specified as 0, and the 7th operand should not |
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261 | be specified. |
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262 | |
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263 | If this operand is specified, it is a list of attribute |
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264 | expressions. If an insn for which any of these expressions |
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265 | is true is currently executing on the function unit, the |
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266 | issue delay will be given by the 6th operand. Otherwise, |
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267 | the insn can be immediately scheduled (subject to the limit |
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268 | on the number of simultaneous operations executing on the |
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269 | unit.) */ |
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270 | DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x') |
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271 | |
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272 | /* Define attribute computation for `asm' instructions. */ |
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273 | DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' ) |
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274 | |
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275 | /* SEQUENCE appears in the result of a `gen_...' function |
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276 | for a DEFINE_EXPAND that wants to make several insns. |
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277 | Its elements are the bodies of the insns that should be made. |
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278 | `emit_insn' takes the SEQUENCE apart and makes separate insns. */ |
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279 | DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x') |
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280 | |
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281 | /* Refers to the address of its argument. |
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282 | This appears only in machine descriptions, indicating that |
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283 | any expression that would be acceptable as the operand of MEM |
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284 | should be matched. */ |
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285 | DEF_RTL_EXPR(ADDRESS, "address", "e", 'm') |
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286 | |
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287 | /* ---------------------------------------------------------------------- |
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288 | Expressions used for insn attributes. These also do not appear in |
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289 | actual rtl code in the compiler. |
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290 | ---------------------------------------------------------------------- */ |
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291 | |
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292 | /* Definition of an insn attribute. |
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293 | 1st operand: name of the attribute |
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294 | 2nd operand: comma-separated list of possible attribute values |
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295 | 3rd operand: expression for the default value of the attribute. */ |
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296 | DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x') |
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297 | |
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298 | /* Marker for the name of an attribute. */ |
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299 | DEF_RTL_EXPR(ATTR, "attr", "s", 'x') |
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300 | |
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301 | /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and |
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302 | in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that |
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303 | pattern. |
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304 | |
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305 | (set_attr "name" "value") is equivalent to |
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306 | (set (attr "name") (const_string "value")) */ |
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307 | DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x') |
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308 | |
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309 | /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to |
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310 | specify that attribute values are to be assigned according to the |
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311 | alternative matched. |
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312 | |
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313 | The following three expressions are equivalent: |
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314 | |
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315 | (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1") |
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316 | (eq_attrq "alternative" "2") (const_string "a2")] |
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317 | (const_string "a3"))) |
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318 | (set_attr_alternative "att" [(const_string "a1") (const_string "a2") |
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319 | (const_string "a3")]) |
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320 | (set_attr "att" "a1,a2,a3") |
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321 | */ |
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322 | DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x') |
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323 | |
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324 | /* A conditional expression true if the value of the specified attribute of |
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325 | the current insn equals the specified value. The first operand is the |
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326 | attribute name and the second is the comparison value. */ |
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327 | DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x') |
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328 | |
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329 | /* A conditional expression which is true if the specified flag is |
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330 | true for the insn being scheduled in reorg. |
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331 | |
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332 | genattr.c defines the following flags which can be tested by |
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333 | (attr_flag "foo") expressions in eligible_for_delay. |
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334 | |
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335 | forward, backward, very_likely, likely, very_unlikely, and unlikely. */ |
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336 | |
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337 | DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x') |
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338 | |
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339 | /* ---------------------------------------------------------------------- |
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340 | Expression types used for things in the instruction chain. |
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341 | |
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342 | All formats must start with "iuu" to handle the chain. |
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343 | Each insn expression holds an rtl instruction and its semantics |
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344 | during back-end processing. |
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345 | See macros's in "rtl.h" for the meaning of each rtx->fld[]. |
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346 | |
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347 | ---------------------------------------------------------------------- */ |
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348 | |
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349 | /* An instruction that cannot jump. */ |
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350 | DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i') |
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351 | |
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352 | /* An instruction that can possibly jump. |
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353 | Fields ( rtx->fld[] ) have exact same meaning as INSN's. */ |
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354 | DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i') |
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355 | |
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356 | /* An instruction that can possibly call a subroutine |
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357 | but which will not change which instruction comes next |
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358 | in the current function. |
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359 | Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE. |
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360 | All other fields ( rtx->fld[] ) have exact same meaning as INSN's. */ |
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361 | DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i') |
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362 | |
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363 | /* A marker that indicates that control will not flow through. */ |
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364 | DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x') |
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365 | |
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366 | /* Holds a label that is followed by instructions. |
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367 | Operand: |
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368 | 3: is a number that is unique in the entire compilation. |
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369 | 4: is the user-given name of the label, if any. |
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370 | 5: is used in jump.c for the use-count of the label. |
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371 | and in flow.c to point to the chain of label_ref's to this label. */ |
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372 | DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x') |
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373 | |
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374 | /* Say where in the code a source line starts, for symbol table's sake. |
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375 | Contains a filename and a line number. Line numbers <= 0 are special: |
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376 | 0 is used in a dummy placed at the front of every function |
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377 | just so there will never be a need to delete the first insn; |
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378 | -1 indicates a dummy; insns to be deleted by flow analysis and combining |
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379 | are really changed to NOTEs with a number of -1. |
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380 | -2 means beginning of a name binding contour; output N_LBRAC. |
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381 | -3 means end of a contour; output N_RBRAC. */ |
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382 | DEF_RTL_EXPR(NOTE, "note", "iuusn", 'x') |
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383 | |
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384 | /* INLINE_HEADER is use by inline function machinery. The information |
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385 | it contains helps to build the mapping function between the rtx's of |
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386 | the function to be inlined and the current function being expanded. */ |
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387 | |
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388 | DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieeiiEeEsse", 'x') |
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389 | |
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390 | /* ---------------------------------------------------------------------- |
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391 | Top level constituents of INSN, JUMP_INSN and CALL_INSN. |
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392 | ---------------------------------------------------------------------- */ |
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393 | |
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394 | /* Several operations to be done in parallel. */ |
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395 | DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x') |
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396 | |
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397 | /* A string that is passed through to the assembler as input. |
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398 | One can obviously pass comments through by using the |
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399 | assembler comment syntax. |
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400 | These occur in an insn all by themselves as the PATTERN. |
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401 | They also appear inside an ASM_OPERANDS |
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402 | as a convenient way to hold a string. */ |
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403 | DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x') |
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404 | |
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405 | /* An assembler instruction with operands. |
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406 | 1st operand is the instruction template. |
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407 | 2nd operand is the constraint for the output. |
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408 | 3rd operand is the number of the output this expression refers to. |
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409 | When an insn stores more than one value, a separate ASM_OPERANDS |
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410 | is made for each output; this integer distinguishes them. |
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411 | 4th is a vector of values of input operands. |
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412 | 5th is a vector of modes and constraints for the input operands. |
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413 | Each element is an ASM_INPUT containing a constraint string |
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414 | and whose mode indicates the mode of the input operand. |
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415 | 6th is the name of the containing source file. |
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416 | 7th is the source line number. */ |
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417 | DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x') |
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418 | |
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419 | /* A machine-specific operation. |
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420 | 1st operand is a vector of operands being used by the operation so that |
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421 | any needed reloads can be done. |
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422 | 2nd operand is a unique value saying which of a number of machine-specific |
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423 | operations is to be performed. |
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424 | (Note that the vector must be the first operand because of the way that |
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425 | genrecog.c record positions within an insn.) |
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426 | This can occur all by itself in a PATTERN, as a component of a PARALLEL, |
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427 | or inside an expression. */ |
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428 | DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x') |
---|
429 | |
---|
430 | /* Similar, but a volatile operation and one which may trap. */ |
---|
431 | DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x') |
---|
432 | |
---|
433 | /* Vector of addresses, stored as full words. */ |
---|
434 | /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */ |
---|
435 | DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x') |
---|
436 | |
---|
437 | /* Vector of address differences X0 - BASE, X1 - BASE, ... |
---|
438 | First operand is BASE; the vector contains the X's. |
---|
439 | The machine mode of this rtx says how much space to leave |
---|
440 | for each difference. */ |
---|
441 | DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x') |
---|
442 | |
---|
443 | /* ---------------------------------------------------------------------- |
---|
444 | At the top level of an instruction (perhaps under PARALLEL). |
---|
445 | ---------------------------------------------------------------------- */ |
---|
446 | |
---|
447 | /* Assignment. |
---|
448 | Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to. |
---|
449 | Operand 2 is the value stored there. |
---|
450 | ALL assignment must use SET. |
---|
451 | Instructions that do multiple assignments must use multiple SET, |
---|
452 | under PARALLEL. */ |
---|
453 | DEF_RTL_EXPR(SET, "set", "ee", 'x') |
---|
454 | |
---|
455 | /* Indicate something is used in a way that we don't want to explain. |
---|
456 | For example, subroutine calls will use the register |
---|
457 | in which the static chain is passed. */ |
---|
458 | DEF_RTL_EXPR(USE, "use", "e", 'x') |
---|
459 | |
---|
460 | /* Indicate something is clobbered in a way that we don't want to explain. |
---|
461 | For example, subroutine calls will clobber some physical registers |
---|
462 | (the ones that are by convention not saved). */ |
---|
463 | DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x') |
---|
464 | |
---|
465 | /* Call a subroutine. |
---|
466 | Operand 1 is the address to call. |
---|
467 | Operand 2 is the number of arguments. */ |
---|
468 | |
---|
469 | DEF_RTL_EXPR(CALL, "call", "ee", 'x') |
---|
470 | |
---|
471 | /* Return from a subroutine. */ |
---|
472 | |
---|
473 | DEF_RTL_EXPR(RETURN, "return", "", 'x') |
---|
474 | |
---|
475 | /* Conditional trap. |
---|
476 | Operand 1 is the condition. |
---|
477 | Operand 2 is the trap code. |
---|
478 | For an unconditional trap, make the condition (const_int 1). */ |
---|
479 | DEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x') |
---|
480 | |
---|
481 | /* ---------------------------------------------------------------------- |
---|
482 | Primitive values for use in expressions. |
---|
483 | ---------------------------------------------------------------------- */ |
---|
484 | |
---|
485 | /* numeric integer constant */ |
---|
486 | DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o') |
---|
487 | |
---|
488 | /* numeric double constant. |
---|
489 | Operand 0 is the MEM that stores this constant in memory, |
---|
490 | or various other things (see comments at immed_double_const in varasm.c). |
---|
491 | Operand 1 is a chain of all CONST_DOUBLEs in use in the current function. |
---|
492 | Remaining operands hold the actual value. |
---|
493 | The number of operands may be more than 2 if cross-compiling; |
---|
494 | see init_rtl. */ |
---|
495 | DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ww", 'o') |
---|
496 | |
---|
497 | /* String constant. Used only for attributes right now. */ |
---|
498 | DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o') |
---|
499 | |
---|
500 | /* This is used to encapsulate an expression whose value is constant |
---|
501 | (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be |
---|
502 | recognized as a constant operand rather than by arithmetic instructions. */ |
---|
503 | |
---|
504 | DEF_RTL_EXPR(CONST, "const", "e", 'o') |
---|
505 | |
---|
506 | /* program counter. Ordinary jumps are represented |
---|
507 | by a SET whose first operand is (PC). */ |
---|
508 | DEF_RTL_EXPR(PC, "pc", "", 'o') |
---|
509 | |
---|
510 | /* A register. The "operand" is the register number, accessed |
---|
511 | with the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER |
---|
512 | than a hardware register is being referred to. */ |
---|
513 | DEF_RTL_EXPR(REG, "reg", "i", 'o') |
---|
514 | |
---|
515 | /* A scratch register. This represents a register used only within a |
---|
516 | single insn. It will be turned into a REG during register allocation |
---|
517 | or reload unless the constraint indicates that the register won't be |
---|
518 | needed, in which case it can remain a SCRATCH. This code is |
---|
519 | marked as having one operand so it can be turned into a REG. */ |
---|
520 | DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o') |
---|
521 | |
---|
522 | /* One word of a multi-word value. |
---|
523 | The first operand is the complete value; the second says which word. |
---|
524 | The WORDS_BIG_ENDIAN flag controls whether word number 0 |
---|
525 | (as numbered in a SUBREG) is the most or least significant word. |
---|
526 | |
---|
527 | This is also used to refer to a value in a different machine mode. |
---|
528 | For example, it can be used to refer to a SImode value as if it were |
---|
529 | Qimode, or vice versa. Then the word number is always 0. */ |
---|
530 | DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x') |
---|
531 | |
---|
532 | /* This one-argument rtx is used for move instructions |
---|
533 | that are guaranteed to alter only the low part of a destination. |
---|
534 | Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...)) |
---|
535 | has an unspecified effect on the high part of REG, |
---|
536 | but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...)) |
---|
537 | is guaranteed to alter only the bits of REG that are in HImode. |
---|
538 | |
---|
539 | The actual instruction used is probably the same in both cases, |
---|
540 | but the register constraints may be tighter when STRICT_LOW_PART |
---|
541 | is in use. */ |
---|
542 | |
---|
543 | DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x') |
---|
544 | |
---|
545 | /* (CONCAT a b) represents the virtual concatenation of a and b |
---|
546 | to make a value that has as many bits as a and b put together. |
---|
547 | This is used for complex values. Normally it appears only |
---|
548 | in DECL_RTLs and during RTL generation, but not in the insn chain. */ |
---|
549 | DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o') |
---|
550 | |
---|
551 | /* A memory location; operand is the address. |
---|
552 | Can be nested inside a VOLATILE. */ |
---|
553 | DEF_RTL_EXPR(MEM, "mem", "e", 'o') |
---|
554 | |
---|
555 | /* Reference to an assembler label in the code for this function. |
---|
556 | The operand is a CODE_LABEL found in the insn chain. |
---|
557 | The unprinted fields 1 and 2 are used in flow.c for the |
---|
558 | LABEL_NEXTREF and CONTAINING_INSN. */ |
---|
559 | DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o') |
---|
560 | |
---|
561 | /* Reference to a named label: the string that is the first operand, |
---|
562 | with `_' added implicitly in front. |
---|
563 | Exception: if the first character explicitly given is `*', |
---|
564 | to give it to the assembler, remove the `*' and do not add `_'. */ |
---|
565 | DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o') |
---|
566 | |
---|
567 | /* The condition code register is represented, in our imagination, |
---|
568 | as a register holding a value that can be compared to zero. |
---|
569 | In fact, the machine has already compared them and recorded the |
---|
570 | results; but instructions that look at the condition code |
---|
571 | pretend to be looking at the entire value and comparing it. */ |
---|
572 | DEF_RTL_EXPR(CC0, "cc0", "", 'o') |
---|
573 | |
---|
574 | /* Reference to the address of a register. Removed by purge_addressof after |
---|
575 | CSE has elided as many as possible. |
---|
576 | 1st operand: the register we may need the address of. |
---|
577 | 2nd operand: the original pseudo regno we were generated for. |
---|
578 | 3rd operand: the decl for the object in the register, for |
---|
579 | put_reg_in_stack. */ |
---|
580 | |
---|
581 | DEF_RTL_EXPR(ADDRESSOF, "addressof", "ei0", 'o') |
---|
582 | |
---|
583 | /* ===================================================================== |
---|
584 | A QUEUED expression really points to a member of the queue of instructions |
---|
585 | to be output later for postincrement/postdecrement. |
---|
586 | QUEUED expressions never become part of instructions. |
---|
587 | When a QUEUED expression would be put into an instruction, |
---|
588 | instead either the incremented variable or a copy of its previous |
---|
589 | value is used. |
---|
590 | |
---|
591 | Operands are: |
---|
592 | 0. the variable to be incremented (a REG rtx). |
---|
593 | 1. the incrementing instruction, or 0 if it hasn't been output yet. |
---|
594 | 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet. |
---|
595 | 3. the body to use for the incrementing instruction |
---|
596 | 4. the next QUEUED expression in the queue. |
---|
597 | ====================================================================== */ |
---|
598 | |
---|
599 | DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x') |
---|
600 | |
---|
601 | /* ---------------------------------------------------------------------- |
---|
602 | Expressions for operators in an rtl pattern |
---|
603 | ---------------------------------------------------------------------- */ |
---|
604 | |
---|
605 | /* if_then_else. This is used in representing ordinary |
---|
606 | conditional jump instructions. |
---|
607 | Operand: |
---|
608 | 0: condition |
---|
609 | 1: then expr |
---|
610 | 2: else expr */ |
---|
611 | DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3') |
---|
612 | |
---|
613 | /* General conditional. The first operand is a vector composed of pairs of |
---|
614 | expressions. The first element of each pair is evaluated, in turn. |
---|
615 | The value of the conditional is the second expression of the first pair |
---|
616 | whose first expression evaluates non-zero. If none of the expressions is |
---|
617 | true, the second operand will be used as the value of the conditional. |
---|
618 | |
---|
619 | This should be replaced with use of IF_THEN_ELSE. */ |
---|
620 | DEF_RTL_EXPR(COND, "cond", "Ee", 'x') |
---|
621 | |
---|
622 | /* Comparison, produces a condition code result. */ |
---|
623 | DEF_RTL_EXPR(COMPARE, "compare", "ee", '2') |
---|
624 | |
---|
625 | /* plus */ |
---|
626 | DEF_RTL_EXPR(PLUS, "plus", "ee", 'c') |
---|
627 | |
---|
628 | /* Operand 0 minus operand 1. */ |
---|
629 | DEF_RTL_EXPR(MINUS, "minus", "ee", '2') |
---|
630 | |
---|
631 | /* Minus operand 0. */ |
---|
632 | DEF_RTL_EXPR(NEG, "neg", "e", '1') |
---|
633 | |
---|
634 | DEF_RTL_EXPR(MULT, "mult", "ee", 'c') |
---|
635 | |
---|
636 | /* Operand 0 divided by operand 1. */ |
---|
637 | DEF_RTL_EXPR(DIV, "div", "ee", '2') |
---|
638 | /* Remainder of operand 0 divided by operand 1. */ |
---|
639 | DEF_RTL_EXPR(MOD, "mod", "ee", '2') |
---|
640 | |
---|
641 | /* Unsigned divide and remainder. */ |
---|
642 | DEF_RTL_EXPR(UDIV, "udiv", "ee", '2') |
---|
643 | DEF_RTL_EXPR(UMOD, "umod", "ee", '2') |
---|
644 | |
---|
645 | /* Bitwise operations. */ |
---|
646 | DEF_RTL_EXPR(AND, "and", "ee", 'c') |
---|
647 | |
---|
648 | DEF_RTL_EXPR(IOR, "ior", "ee", 'c') |
---|
649 | |
---|
650 | DEF_RTL_EXPR(XOR, "xor", "ee", 'c') |
---|
651 | |
---|
652 | DEF_RTL_EXPR(NOT, "not", "e", '1') |
---|
653 | |
---|
654 | /* Operand: |
---|
655 | 0: value to be shifted. |
---|
656 | 1: number of bits. */ |
---|
657 | DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2') |
---|
658 | DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2') |
---|
659 | |
---|
660 | /* Right shift operations, for machines where these are not the same |
---|
661 | as left shifting with a negative argument. */ |
---|
662 | |
---|
663 | DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2') |
---|
664 | DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2') |
---|
665 | DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2') |
---|
666 | |
---|
667 | /* Minimum and maximum values of two operands. We need both signed and |
---|
668 | unsigned forms. (We cannot use MIN for SMIN because it conflicts |
---|
669 | with a macro of the same name.) */ |
---|
670 | |
---|
671 | DEF_RTL_EXPR(SMIN, "smin", "ee", 'c') |
---|
672 | DEF_RTL_EXPR(SMAX, "smax", "ee", 'c') |
---|
673 | DEF_RTL_EXPR(UMIN, "umin", "ee", 'c') |
---|
674 | DEF_RTL_EXPR(UMAX, "umax", "ee", 'c') |
---|
675 | |
---|
676 | /* These unary operations are used to represent incrementation |
---|
677 | and decrementation as they occur in memory addresses. |
---|
678 | The amount of increment or decrement are not represented |
---|
679 | because they can be understood from the machine-mode of the |
---|
680 | containing MEM. These operations exist in only two cases: |
---|
681 | 1. pushes onto the stack. |
---|
682 | 2. created automatically by the life_analysis pass in flow.c. */ |
---|
683 | DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x') |
---|
684 | DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x') |
---|
685 | DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x') |
---|
686 | DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x') |
---|
687 | |
---|
688 | /* Comparison operations. The ordered comparisons exist in two |
---|
689 | flavors, signed and unsigned. */ |
---|
690 | DEF_RTL_EXPR(NE, "ne", "ee", '<') |
---|
691 | DEF_RTL_EXPR(EQ, "eq", "ee", '<') |
---|
692 | DEF_RTL_EXPR(GE, "ge", "ee", '<') |
---|
693 | DEF_RTL_EXPR(GT, "gt", "ee", '<') |
---|
694 | DEF_RTL_EXPR(LE, "le", "ee", '<') |
---|
695 | DEF_RTL_EXPR(LT, "lt", "ee", '<') |
---|
696 | DEF_RTL_EXPR(GEU, "geu", "ee", '<') |
---|
697 | DEF_RTL_EXPR(GTU, "gtu", "ee", '<') |
---|
698 | DEF_RTL_EXPR(LEU, "leu", "ee", '<') |
---|
699 | DEF_RTL_EXPR(LTU, "ltu", "ee", '<') |
---|
700 | |
---|
701 | /* Represents the result of sign-extending the sole operand. |
---|
702 | The machine modes of the operand and of the SIGN_EXTEND expression |
---|
703 | determine how much sign-extension is going on. */ |
---|
704 | DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1') |
---|
705 | |
---|
706 | /* Similar for zero-extension (such as unsigned short to int). */ |
---|
707 | DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1') |
---|
708 | |
---|
709 | /* Similar but here the operand has a wider mode. */ |
---|
710 | DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1') |
---|
711 | |
---|
712 | /* Similar for extending floating-point values (such as SFmode to DFmode). */ |
---|
713 | DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1') |
---|
714 | DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1') |
---|
715 | |
---|
716 | /* Conversion of fixed point operand to floating point value. */ |
---|
717 | DEF_RTL_EXPR(FLOAT, "float", "e", '1') |
---|
718 | |
---|
719 | /* With fixed-point machine mode: |
---|
720 | Conversion of floating point operand to fixed point value. |
---|
721 | Value is defined only when the operand's value is an integer. |
---|
722 | With floating-point machine mode (and operand with same mode): |
---|
723 | Operand is rounded toward zero to produce an integer value |
---|
724 | represented in floating point. */ |
---|
725 | DEF_RTL_EXPR(FIX, "fix", "e", '1') |
---|
726 | |
---|
727 | /* Conversion of unsigned fixed point operand to floating point value. */ |
---|
728 | DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1') |
---|
729 | |
---|
730 | /* With fixed-point machine mode: |
---|
731 | Conversion of floating point operand to *unsigned* fixed point value. |
---|
732 | Value is defined only when the operand's value is an integer. */ |
---|
733 | DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1') |
---|
734 | |
---|
735 | /* Absolute value */ |
---|
736 | DEF_RTL_EXPR(ABS, "abs", "e", '1') |
---|
737 | |
---|
738 | /* Square root */ |
---|
739 | DEF_RTL_EXPR(SQRT, "sqrt", "e", '1') |
---|
740 | |
---|
741 | /* Find first bit that is set. |
---|
742 | Value is 1 + number of trailing zeros in the arg., |
---|
743 | or 0 if arg is 0. */ |
---|
744 | DEF_RTL_EXPR(FFS, "ffs", "e", '1') |
---|
745 | |
---|
746 | /* Reference to a signed bit-field of specified size and position. |
---|
747 | Operand 0 is the memory unit (usually SImode or QImode) which |
---|
748 | contains the field's first bit. Operand 1 is the width, in bits. |
---|
749 | Operand 2 is the number of bits in the memory unit before the |
---|
750 | first bit of this field. |
---|
751 | If BITS_BIG_ENDIAN is defined, the first bit is the msb and |
---|
752 | operand 2 counts from the msb of the memory unit. |
---|
753 | Otherwise, the first bit is the lsb and operand 2 counts from |
---|
754 | the lsb of the memory unit. */ |
---|
755 | DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b') |
---|
756 | |
---|
757 | /* Similar for unsigned bit-field. */ |
---|
758 | DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b') |
---|
759 | |
---|
760 | /* For RISC machines. These save memory when splitting insns. */ |
---|
761 | |
---|
762 | /* HIGH are the high-order bits of a constant expression. */ |
---|
763 | DEF_RTL_EXPR(HIGH, "high", "e", 'o') |
---|
764 | |
---|
765 | /* LO_SUM is the sum of a register and the low-order bits |
---|
766 | of a constant expression. */ |
---|
767 | DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o') |
---|
768 | |
---|
769 | /* |
---|
770 | Local variables: |
---|
771 | mode:c |
---|
772 | End: |
---|
773 | */ |
---|