| 1 | dnl Alpha time stamp counter access routine. |
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| 2 | |
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| 3 | dnl Copyright 2000 Free Software Foundation, Inc. |
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| 4 | dnl |
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| 5 | dnl This file is part of the GNU MP Library. |
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| 6 | dnl |
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| 7 | dnl The GNU MP Library is free software; you can redistribute it and/or |
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| 8 | dnl modify it under the terms of the GNU Lesser General Public License as |
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| 9 | dnl published by the Free Software Foundation; either version 2.1 of the |
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| 10 | dnl License, or (at your option) any later version. |
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| 11 | dnl |
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| 12 | dnl The GNU MP Library is distributed in the hope that it will be useful, |
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| 13 | dnl but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 15 | dnl Lesser General Public License for more details. |
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| 16 | dnl |
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| 17 | dnl You should have received a copy of the GNU Lesser General Public |
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| 18 | dnl License along with the GNU MP Library; see the file COPYING.LIB. If |
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| 19 | dnl not, write to the Free Software Foundation, Inc., 59 Temple Place - |
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| 20 | dnl Suite 330, Boston, MA 02111-1307, USA. |
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| 21 | |
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| 22 | include(`../config.m4') |
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| 23 | |
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| 24 | |
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| 25 | C void speed_cyclecounter (unsigned int p[2]); |
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| 26 | C |
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| 27 | |
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| 28 | C The rpcc instruction returns a 64-bit value split into two 32-bit fields. |
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| 29 | C The lower 32 bits are set by the hardware, and the upper 32 bits are set |
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| 30 | C by the operating system. The real per-process cycle count is the sum of |
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| 31 | C these halves. |
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| 32 | |
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| 33 | C Unfortunately, some operating systems don't get this right. NetBSD 1.3 is |
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| 34 | C known to sometimes put garbage in the upper half. Whether newer NetBSD |
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| 35 | C versions get it right, is unknown to us. |
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| 36 | |
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| 37 | C rpcc measures cycles elapsed in the user program and hence should be very |
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| 38 | C accurate even on a busy system. Losing cache contents due to task |
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| 39 | C switching may have an effect though. |
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| 40 | |
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| 41 | ASM_START() |
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| 42 | PROLOGUE(speed_cyclecounter) |
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| 43 | rpcc r0 |
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| 44 | srl r0,32,r1 |
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| 45 | addq r1,r0,r0 |
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| 46 | stl r0,0(r16) |
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| 47 | stl r31,4(r16) C zero upper return word |
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| 48 | ret r31,(r26),1 |
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| 49 | EPILOGUE(speed_cyclecounter) |
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| 50 | ASM_END() |
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