1 | This is Info file gcc.info, produced by Makeinfo version 1.67 from the |
---|
2 | input file gcc.texi. |
---|
3 | |
---|
4 | This file documents the use and the internals of the GNU compiler. |
---|
5 | |
---|
6 | Published by the Free Software Foundation 59 Temple Place - Suite 330 |
---|
7 | Boston, MA 02111-1307 USA |
---|
8 | |
---|
9 | Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998 |
---|
10 | Free Software Foundation, Inc. |
---|
11 | |
---|
12 | Permission is granted to make and distribute verbatim copies of this |
---|
13 | manual provided the copyright notice and this permission notice are |
---|
14 | preserved on all copies. |
---|
15 | |
---|
16 | Permission is granted to copy and distribute modified versions of |
---|
17 | this manual under the conditions for verbatim copying, provided also |
---|
18 | that the sections entitled "GNU General Public License," "Funding for |
---|
19 | Free Software," and "Protect Your Freedom--Fight `Look And Feel'" are |
---|
20 | included exactly as in the original, and provided that the entire |
---|
21 | resulting derived work is distributed under the terms of a permission |
---|
22 | notice identical to this one. |
---|
23 | |
---|
24 | Permission is granted to copy and distribute translations of this |
---|
25 | manual into another language, under the above conditions for modified |
---|
26 | versions, except that the sections entitled "GNU General Public |
---|
27 | License," "Funding for Free Software," and "Protect Your Freedom--Fight |
---|
28 | `Look And Feel'", and this permission notice, may be included in |
---|
29 | translations approved by the Free Software Foundation instead of in the |
---|
30 | original English. |
---|
31 | |
---|
32 | |
---|
33 | File: gcc.info, Node: M88K Options, Next: RS/6000 and PowerPC Options, Prev: M32R/D Options, Up: Submodel Options |
---|
34 | |
---|
35 | M88K Options |
---|
36 | ------------ |
---|
37 | |
---|
38 | These `-m' options are defined for Motorola 88k architectures: |
---|
39 | |
---|
40 | `-m88000' |
---|
41 | Generate code that works well on both the m88100 and the m88110. |
---|
42 | |
---|
43 | `-m88100' |
---|
44 | Generate code that works best for the m88100, but that also runs |
---|
45 | on the m88110. |
---|
46 | |
---|
47 | `-m88110' |
---|
48 | Generate code that works best for the m88110, and may not run on |
---|
49 | the m88100. |
---|
50 | |
---|
51 | `-mbig-pic' |
---|
52 | Obsolete option to be removed from the next revision. Use `-fPIC'. |
---|
53 | |
---|
54 | `-midentify-revision' |
---|
55 | Include an `ident' directive in the assembler output recording the |
---|
56 | source file name, compiler name and version, timestamp, and |
---|
57 | compilation flags used. |
---|
58 | |
---|
59 | `-mno-underscores' |
---|
60 | In assembler output, emit symbol names without adding an underscore |
---|
61 | character at the beginning of each name. The default is to use an |
---|
62 | underscore as prefix on each name. |
---|
63 | |
---|
64 | `-mocs-debug-info' |
---|
65 | `-mno-ocs-debug-info' |
---|
66 | Include (or omit) additional debugging information (about |
---|
67 | registers used in each stack frame) as specified in the 88open |
---|
68 | Object Compatibility Standard, "OCS". This extra information |
---|
69 | allows debugging of code that has had the frame pointer |
---|
70 | eliminated. The default for DG/UX, SVr4, and Delta 88 SVr3.2 is |
---|
71 | to include this information; other 88k configurations omit this |
---|
72 | information by default. |
---|
73 | |
---|
74 | `-mocs-frame-position' |
---|
75 | When emitting COFF debugging information for automatic variables |
---|
76 | and parameters stored on the stack, use the offset from the |
---|
77 | canonical frame address, which is the stack pointer (register 31) |
---|
78 | on entry to the function. The DG/UX, SVr4, Delta88 SVr3.2, and |
---|
79 | BCS configurations use `-mocs-frame-position'; other 88k |
---|
80 | configurations have the default `-mno-ocs-frame-position'. |
---|
81 | |
---|
82 | `-mno-ocs-frame-position' |
---|
83 | When emitting COFF debugging information for automatic variables |
---|
84 | and parameters stored on the stack, use the offset from the frame |
---|
85 | pointer register (register 30). When this option is in effect, |
---|
86 | the frame pointer is not eliminated when debugging information is |
---|
87 | selected by the -g switch. |
---|
88 | |
---|
89 | `-moptimize-arg-area' |
---|
90 | `-mno-optimize-arg-area' |
---|
91 | Control how function arguments are stored in stack frames. |
---|
92 | `-moptimize-arg-area' saves space by optimizing them, but this |
---|
93 | conflicts with the 88open specifications. The opposite |
---|
94 | alternative, `-mno-optimize-arg-area', agrees with 88open |
---|
95 | standards. By default GNU CC does not optimize the argument area. |
---|
96 | |
---|
97 | `-mshort-data-NUM' |
---|
98 | Generate smaller data references by making them relative to `r0', |
---|
99 | which allows loading a value using a single instruction (rather |
---|
100 | than the usual two). You control which data references are |
---|
101 | affected by specifying NUM with this option. For example, if you |
---|
102 | specify `-mshort-data-512', then the data references affected are |
---|
103 | those involving displacements of less than 512 bytes. |
---|
104 | `-mshort-data-NUM' is not effective for NUM greater than 64k. |
---|
105 | |
---|
106 | `-mserialize-volatile' |
---|
107 | `-mno-serialize-volatile' |
---|
108 | Do, or don't, generate code to guarantee sequential consistency of |
---|
109 | volatile memory references. By default, consistency is guaranteed. |
---|
110 | |
---|
111 | The order of memory references made by the MC88110 processor does |
---|
112 | not always match the order of the instructions requesting those |
---|
113 | references. In particular, a load instruction may execute before |
---|
114 | a preceding store instruction. Such reordering violates |
---|
115 | sequential consistency of volatile memory references, when there |
---|
116 | are multiple processors. When consistency must be guaranteed, |
---|
117 | GNU C generates special instructions, as needed, to force |
---|
118 | execution in the proper order. |
---|
119 | |
---|
120 | The MC88100 processor does not reorder memory references and so |
---|
121 | always provides sequential consistency. However, by default, GNU |
---|
122 | C generates the special instructions to guarantee consistency even |
---|
123 | when you use `-m88100', so that the code may be run on an MC88110 |
---|
124 | processor. If you intend to run your code only on the MC88100 |
---|
125 | processor, you may use `-mno-serialize-volatile'. |
---|
126 | |
---|
127 | The extra code generated to guarantee consistency may affect the |
---|
128 | performance of your application. If you know that you can safely |
---|
129 | forgo this guarantee, you may use `-mno-serialize-volatile'. |
---|
130 | |
---|
131 | `-msvr4' |
---|
132 | `-msvr3' |
---|
133 | Turn on (`-msvr4') or off (`-msvr3') compiler extensions related |
---|
134 | to System V release 4 (SVr4). This controls the following: |
---|
135 | |
---|
136 | 1. Which variant of the assembler syntax to emit. |
---|
137 | |
---|
138 | 2. `-msvr4' makes the C preprocessor recognize `#pragma weak' |
---|
139 | that is used on System V release 4. |
---|
140 | |
---|
141 | 3. `-msvr4' makes GNU CC issue additional declaration directives |
---|
142 | used in SVr4. |
---|
143 | |
---|
144 | `-msvr4' is the default for the m88k-motorola-sysv4 and |
---|
145 | m88k-dg-dgux m88k configurations. `-msvr3' is the default for all |
---|
146 | other m88k configurations. |
---|
147 | |
---|
148 | `-mversion-03.00' |
---|
149 | This option is obsolete, and is ignored. |
---|
150 | |
---|
151 | `-mno-check-zero-division' |
---|
152 | `-mcheck-zero-division' |
---|
153 | Do, or don't, generate code to guarantee that integer division by |
---|
154 | zero will be detected. By default, detection is guaranteed. |
---|
155 | |
---|
156 | Some models of the MC88100 processor fail to trap upon integer |
---|
157 | division by zero under certain conditions. By default, when |
---|
158 | compiling code that might be run on such a processor, GNU C |
---|
159 | generates code that explicitly checks for zero-valued divisors and |
---|
160 | traps with exception number 503 when one is detected. Use of |
---|
161 | mno-check-zero-division suppresses such checking for code |
---|
162 | generated to run on an MC88100 processor. |
---|
163 | |
---|
164 | GNU C assumes that the MC88110 processor correctly detects all |
---|
165 | instances of integer division by zero. When `-m88110' is |
---|
166 | specified, both `-mcheck-zero-division' and |
---|
167 | `-mno-check-zero-division' are ignored, and no explicit checks for |
---|
168 | zero-valued divisors are generated. |
---|
169 | |
---|
170 | `-muse-div-instruction' |
---|
171 | Use the div instruction for signed integer division on the MC88100 |
---|
172 | processor. By default, the div instruction is not used. |
---|
173 | |
---|
174 | On the MC88100 processor the signed integer division instruction |
---|
175 | div) traps to the operating system on a negative operand. The |
---|
176 | operating system transparently completes the operation, but at a |
---|
177 | large cost in execution time. By default, when compiling code |
---|
178 | that might be run on an MC88100 processor, GNU C emulates signed |
---|
179 | integer division using the unsigned integer division instruction |
---|
180 | divu), thereby avoiding the large penalty of a trap to the |
---|
181 | operating system. Such emulation has its own, smaller, execution |
---|
182 | cost in both time and space. To the extent that your code's |
---|
183 | important signed integer division operations are performed on two |
---|
184 | nonnegative operands, it may be desirable to use the div |
---|
185 | instruction directly. |
---|
186 | |
---|
187 | On the MC88110 processor the div instruction (also known as the |
---|
188 | divs instruction) processes negative operands without trapping to |
---|
189 | the operating system. When `-m88110' is specified, |
---|
190 | `-muse-div-instruction' is ignored, and the div instruction is used |
---|
191 | for signed integer division. |
---|
192 | |
---|
193 | Note that the result of dividing INT_MIN by -1 is undefined. In |
---|
194 | particular, the behavior of such a division with and without |
---|
195 | `-muse-div-instruction' may differ. |
---|
196 | |
---|
197 | `-mtrap-large-shift' |
---|
198 | `-mhandle-large-shift' |
---|
199 | Include code to detect bit-shifts of more than 31 bits; |
---|
200 | respectively, trap such shifts or emit code to handle them |
---|
201 | properly. By default GNU CC makes no special provision for large |
---|
202 | bit shifts. |
---|
203 | |
---|
204 | `-mwarn-passed-structs' |
---|
205 | Warn when a function passes a struct as an argument or result. |
---|
206 | Structure-passing conventions have changed during the evolution of |
---|
207 | the C language, and are often the source of portability problems. |
---|
208 | By default, GNU CC issues no such warning. |
---|
209 | |
---|
210 | |
---|
211 | File: gcc.info, Node: RS/6000 and PowerPC Options, Next: RT Options, Prev: M88K Options, Up: Submodel Options |
---|
212 | |
---|
213 | IBM RS/6000 and PowerPC Options |
---|
214 | ------------------------------- |
---|
215 | |
---|
216 | These `-m' options are defined for the IBM RS/6000 and PowerPC: |
---|
217 | `-mpower' |
---|
218 | `-mno-power' |
---|
219 | `-mpower2' |
---|
220 | `-mno-power2' |
---|
221 | `-mpowerpc' |
---|
222 | `-mno-powerpc' |
---|
223 | `-mpowerpc-gpopt' |
---|
224 | `-mno-powerpc-gpopt' |
---|
225 | `-mpowerpc-gfxopt' |
---|
226 | `-mno-powerpc-gfxopt' |
---|
227 | GNU CC supports two related instruction set architectures for the |
---|
228 | RS/6000 and PowerPC. The "POWER" instruction set are those |
---|
229 | instructions supported by the `rios' chip set used in the original |
---|
230 | RS/6000 systems and the "PowerPC" instruction set is the |
---|
231 | architecture of the Motorola MPC5xx, MPC6xx, MPC8xx |
---|
232 | microprocessors, and the IBM 4xx microprocessors. |
---|
233 | |
---|
234 | Neither architecture is a subset of the other. However there is a |
---|
235 | large common subset of instructions supported by both. An MQ |
---|
236 | register is included in processors supporting the POWER |
---|
237 | architecture. |
---|
238 | |
---|
239 | You use these options to specify which instructions are available |
---|
240 | on the processor you are using. The default value of these |
---|
241 | options is determined when configuring GNU CC. Specifying the |
---|
242 | `-mcpu=CPU_TYPE' overrides the specification of these options. We |
---|
243 | recommend you use the `-mcpu=CPU_TYPE' option rather than the |
---|
244 | options listed above. |
---|
245 | |
---|
246 | The `-mpower' option allows GNU CC to generate instructions that |
---|
247 | are found only in the POWER architecture and to use the MQ |
---|
248 | register. Specifying `-mpower2' implies `-power' and also allows |
---|
249 | GNU CC to generate instructions that are present in the POWER2 |
---|
250 | architecture but not the original POWER architecture. |
---|
251 | |
---|
252 | The `-mpowerpc' option allows GNU CC to generate instructions that |
---|
253 | are found only in the 32-bit subset of the PowerPC architecture. |
---|
254 | Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows |
---|
255 | GNU CC to use the optional PowerPC architecture instructions in the |
---|
256 | General Purpose group, including floating-point square root. |
---|
257 | Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows |
---|
258 | GNU CC to use the optional PowerPC architecture instructions in |
---|
259 | the Graphics group, including floating-point select. |
---|
260 | |
---|
261 | If you specify both `-mno-power' and `-mno-powerpc', GNU CC will |
---|
262 | use only the instructions in the common subset of both |
---|
263 | architectures plus some special AIX common-mode calls, and will |
---|
264 | not use the MQ register. Specifying both `-mpower' and `-mpowerpc' |
---|
265 | permits GNU CC to use any instruction from either architecture and |
---|
266 | to allow use of the MQ register; specify this for the Motorola |
---|
267 | MPC601. |
---|
268 | |
---|
269 | `-mnew-mnemonics' |
---|
270 | `-mold-mnemonics' |
---|
271 | Select which mnemonics to use in the generated assembler code. |
---|
272 | `-mnew-mnemonics' requests output that uses the assembler mnemonics |
---|
273 | defined for the PowerPC architecture, while `-mold-mnemonics' |
---|
274 | requests the assembler mnemonics defined for the POWER |
---|
275 | architecture. Instructions defined in only one architecture have |
---|
276 | only one mnemonic; GNU CC uses that mnemonic irrespective of which |
---|
277 | of these options is specified. |
---|
278 | |
---|
279 | PowerPC assemblers support both the old and new mnemonics, as will |
---|
280 | later POWER assemblers. Current POWER assemblers only support the |
---|
281 | old mnemonics. Specify `-mnew-mnemonics' if you have an assembler |
---|
282 | that supports them, otherwise specify `-mold-mnemonics'. |
---|
283 | |
---|
284 | The default value of these options depends on how GNU CC was |
---|
285 | configured. Specifying `-mcpu=CPU_TYPE' sometimes overrides the |
---|
286 | value of these option. Unless you are building a cross-compiler, |
---|
287 | you should normally not specify either `-mnew-mnemonics' or |
---|
288 | `-mold-mnemonics', but should instead accept the default. |
---|
289 | |
---|
290 | `-mcpu=CPU_TYPE' |
---|
291 | Set architecture type, register usage, choice of mnemonics, and |
---|
292 | instruction scheduling parameters for machine type CPU_TYPE. |
---|
293 | Supported values for CPU_TYPE are `rs6000', `rios1', `rios2', |
---|
294 | `rsc', `601', `602', `603', `603e', `604', `604e', `620', `power', |
---|
295 | `power2', `powerpc', `403', `505', `801', `821', `823', and `860' |
---|
296 | and `common'. `-mcpu=power', `-mcpu=power2', and `-mcpu=powerpc' |
---|
297 | specify generic POWER, POWER2 and pure PowerPC (i.e., not MPC601) |
---|
298 | architecture machine types, with an appropriate, generic processor |
---|
299 | model assumed for scheduling purposes. |
---|
300 | |
---|
301 | Specifying any of the following options: `-mcpu=rios1', |
---|
302 | `-mcpu=rios2', `-mcpu=rsc', `-mcpu=power', or `-mcpu=power2' |
---|
303 | enables the `-mpower' option and disables the `-mpowerpc' option; |
---|
304 | `-mcpu=601' enables both the `-mpower' and `-mpowerpc' options. |
---|
305 | All of `-mcpu=602', `-mcpu=603', `-mcpu=603e', `-mcpu=604', |
---|
306 | `-mcpu=620', enable the `-mpowerpc' option and disable the |
---|
307 | `-mpower' option. Exactly similarly, all of `-mcpu=403', |
---|
308 | `-mcpu=505', `-mcpu=821', `-mcpu=860' and `-mcpu=powerpc' enable |
---|
309 | the `-mpowerpc' option and disable the `-mpower' option. |
---|
310 | `-mcpu=common' disables both the `-mpower' and `-mpowerpc' options. |
---|
311 | |
---|
312 | AIX versions 4 or greater selects `-mcpu=common' by default, so |
---|
313 | that code will operate on all members of the RS/6000 and PowerPC |
---|
314 | families. In that case, GNU CC will use only the instructions in |
---|
315 | the common subset of both architectures plus some special AIX |
---|
316 | common-mode calls, and will not use the MQ register. GNU CC |
---|
317 | assumes a generic processor model for scheduling purposes. |
---|
318 | |
---|
319 | Specifying any of the options `-mcpu=rios1', `-mcpu=rios2', |
---|
320 | `-mcpu=rsc', `-mcpu=power', or `-mcpu=power2' also disables the |
---|
321 | `new-mnemonics' option. Specifying `-mcpu=601', `-mcpu=602', |
---|
322 | `-mcpu=603', `-mcpu=603e', `-mcpu=604', `620', `403', or |
---|
323 | `-mcpu=powerpc' also enables the `new-mnemonics' option. |
---|
324 | |
---|
325 | Specifying `-mcpu=403', `-mcpu=821', or `-mcpu=860' also enables |
---|
326 | the `-msoft-float' option. |
---|
327 | |
---|
328 | `-mtune=CPU_TYPE' |
---|
329 | Set the instruction scheduling parameters for machine type |
---|
330 | CPU_TYPE, but do not set the architecture type, register usage, |
---|
331 | choice of mnemonics like `-mcpu='CPU_TYPE would. The same values |
---|
332 | for CPU_TYPE are used for `-mtune='CPU_TYPE as for |
---|
333 | `-mcpu='CPU_TYPE. The `-mtune='CPU_TYPE option overrides the |
---|
334 | `-mcpu='CPU_TYPE option in terms of instruction scheduling |
---|
335 | parameters. |
---|
336 | |
---|
337 | `-mfull-toc' |
---|
338 | `-mno-fp-in-toc' |
---|
339 | `-mno-sum-in-toc' |
---|
340 | `-mminimal-toc' |
---|
341 | Modify generation of the TOC (Table Of Contents), which is created |
---|
342 | for every executable file. The `-mfull-toc' option is selected by |
---|
343 | default. In that case, GNU CC will allocate at least one TOC |
---|
344 | entry for each unique non-automatic variable reference in your |
---|
345 | program. GNU CC will also place floating-point constants in the |
---|
346 | TOC. However, only 16,384 entries are available in the TOC. |
---|
347 | |
---|
348 | If you receive a linker error message that saying you have |
---|
349 | overflowed the available TOC space, you can reduce the amount of |
---|
350 | TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc' |
---|
351 | options. `-mno-fp-in-toc' prevents GNU CC from putting |
---|
352 | floating-point constants in the TOC and `-mno-sum-in-toc' forces |
---|
353 | GNU CC to generate code to calculate the sum of an address and a |
---|
354 | constant at run-time instead of putting that sum into the TOC. |
---|
355 | You may specify one or both of these options. Each causes GNU CC |
---|
356 | to produce very slightly slower and larger code at the expense of |
---|
357 | conserving TOC space. |
---|
358 | |
---|
359 | If you still run out of space in the TOC even when you specify |
---|
360 | both of these options, specify `-mminimal-toc' instead. This |
---|
361 | option causes GNU CC to make only one TOC entry for every file. |
---|
362 | When you specify this option, GNU CC will produce code that is |
---|
363 | slower and larger but which uses extremely little TOC space. You |
---|
364 | may wish to use this option only on files that contain less |
---|
365 | frequently executed code. |
---|
366 | |
---|
367 | `-mxl-call' |
---|
368 | `-mno-xl-call' |
---|
369 | On AIX, pass floating-point arguments to prototyped functions |
---|
370 | beyond the register save area (RSA) on the stack in addition to |
---|
371 | argument FPRs. The AIX calling convention was extended but not |
---|
372 | initially documented to handle an obscure K&R C case of calling a |
---|
373 | function that takes the address of its arguments with fewer |
---|
374 | arguments than declared. AIX XL compilers assume that floating |
---|
375 | point arguments which do not fit in the RSA are on the stack when |
---|
376 | they compile a subroutine without optimization. Because always |
---|
377 | storing floating-point arguments on the stack is inefficient and |
---|
378 | rarely needed, this option is not enabled by default and only is |
---|
379 | necessary when calling subroutines compiled by AIX XL compilers |
---|
380 | without optimization. |
---|
381 | |
---|
382 | `-mthreads' |
---|
383 | Support "AIX Threads". Link an application written to use |
---|
384 | "pthreads" with special libraries and startup code to enable the |
---|
385 | application to run. |
---|
386 | |
---|
387 | `-mpe' |
---|
388 | Support "IBM RS/6000 SP" "Parallel Environment" (PE). Link an |
---|
389 | application written to use message passing with special startup |
---|
390 | code to enable the application to run. The system must have PE |
---|
391 | installed in the standard location (`/usr/lpp/ppe.poe/'), or the |
---|
392 | `specs' file must be overridden with the `-specs=' option to |
---|
393 | specify the appropriate directory location. The Parallel |
---|
394 | Environment does not support threads, so the `-mpe' option and the |
---|
395 | `-mthreads' option are incompatible. |
---|
396 | |
---|
397 | `-msoft-float' |
---|
398 | `-mhard-float' |
---|
399 | Generate code that does not use (uses) the floating-point register |
---|
400 | set. Software floating point emulation is provided if you use the |
---|
401 | `-msoft-float' option, and pass the option to GNU CC when linking. |
---|
402 | |
---|
403 | `-mmultiple' |
---|
404 | `-mno-multiple' |
---|
405 | Generate code that uses (does not use) the load multiple word |
---|
406 | instructions and the store multiple word instructions. These |
---|
407 | instructions are generated by default on POWER systems, and not |
---|
408 | generated on PowerPC systems. Do not use `-mmultiple' on little |
---|
409 | endian PowerPC systems, since those instructions do not work when |
---|
410 | the processor is in little endian mode. |
---|
411 | |
---|
412 | `-mstring' |
---|
413 | `-mno-string' |
---|
414 | Generate code that uses (does not use) the load string |
---|
415 | instructions and the store string word instructions to save |
---|
416 | multiple registers and do small block moves. These instructions |
---|
417 | are generated by default on POWER systems, and not generated on |
---|
418 | PowerPC systems. Do not use `-mstring' on little endian PowerPC |
---|
419 | systems, since those instructions do not work when the processor |
---|
420 | is in little endian mode. |
---|
421 | |
---|
422 | `-mupdate' |
---|
423 | `-mno-update' |
---|
424 | Generate code that uses (does not use) the load or store |
---|
425 | instructions that update the base register to the address of the |
---|
426 | calculated memory location. These instructions are generated by |
---|
427 | default. If you use `-mno-update', there is a small window |
---|
428 | between the time that the stack pointer is updated and the address |
---|
429 | of the previous frame is stored, which means code that walks the |
---|
430 | stack frame across interrupts or signals may get corrupted data. |
---|
431 | |
---|
432 | `-mfused-madd' |
---|
433 | `-mno-fused-madd' |
---|
434 | Generate code that uses (does not use) the floating point multiply |
---|
435 | and accumulate instructions. These instructions are generated by |
---|
436 | default if hardware floating is used. |
---|
437 | |
---|
438 | `-mno-bit-align' |
---|
439 | `-mbit-align' |
---|
440 | On System V.4 and embedded PowerPC systems do not (do) force |
---|
441 | structures and unions that contain bit fields to be aligned to the |
---|
442 | base type of the bit field. |
---|
443 | |
---|
444 | For example, by default a structure containing nothing but 8 |
---|
445 | `unsigned' bitfields of length 1 would be aligned to a 4 byte |
---|
446 | boundary and have a size of 4 bytes. By using `-mno-bit-align', |
---|
447 | the structure would be aligned to a 1 byte boundary and be one |
---|
448 | byte in size. |
---|
449 | |
---|
450 | `-mno-strict-align' |
---|
451 | `-mstrict-align' |
---|
452 | On System V.4 and embedded PowerPC systems do not (do) assume that |
---|
453 | unaligned memory references will be handled by the system. |
---|
454 | |
---|
455 | `-mrelocatable' |
---|
456 | `-mno-relocatable' |
---|
457 | On embedded PowerPC systems generate code that allows (does not |
---|
458 | allow) the program to be relocated to a different address at |
---|
459 | runtime. If you use `-mrelocatable' on any module, all objects |
---|
460 | linked together must be compiled with `-mrelocatable' or |
---|
461 | `-mrelocatable-lib'. |
---|
462 | |
---|
463 | `-mrelocatable-lib' |
---|
464 | `-mno-relocatable-lib' |
---|
465 | On embedded PowerPC systems generate code that allows (does not |
---|
466 | allow) the program to be relocated to a different address at |
---|
467 | runtime. Modules compiled with `-mrelocatable-lib' can be linked |
---|
468 | with either modules compiled without `-mrelocatable' and |
---|
469 | `-mrelocatable-lib' or with modules compiled with the |
---|
470 | `-mrelocatable' options. |
---|
471 | |
---|
472 | `-mno-toc' |
---|
473 | `-mtoc' |
---|
474 | On System V.4 and embedded PowerPC systems do not (do) assume that |
---|
475 | register 2 contains a pointer to a global area pointing to the |
---|
476 | addresses used in the program. |
---|
477 | |
---|
478 | `-mno-traceback' |
---|
479 | `-mtraceback' |
---|
480 | On embedded PowerPC systems do not (do) generate a traceback tag |
---|
481 | before the start of the function. This tag can be used by the |
---|
482 | debugger to identify where the start of a function is. |
---|
483 | |
---|
484 | `-mlittle' |
---|
485 | `-mlittle-endian' |
---|
486 | On System V.4 and embedded PowerPC systems compile code for the |
---|
487 | processor in little endian mode. The `-mlittle-endian' option is |
---|
488 | the same as `-mlittle'. |
---|
489 | |
---|
490 | `-mbig' |
---|
491 | `-mbig-endian' |
---|
492 | On System V.4 and embedded PowerPC systems compile code for the |
---|
493 | processor in big endian mode. The `-mbig-endian' option is the |
---|
494 | same as `-mbig'. |
---|
495 | |
---|
496 | `-mcall-sysv' |
---|
497 | On System V.4 and embedded PowerPC systems compile code using |
---|
498 | calling conventions that adheres to the March 1995 draft of the |
---|
499 | System V Application Binary Interface, PowerPC processor |
---|
500 | supplement. This is the default unless you configured GCC using |
---|
501 | `powerpc-*-eabiaix'. |
---|
502 | |
---|
503 | `-mcall-sysv-eabi' |
---|
504 | Specify both `-mcall-sysv' and `-meabi' options. |
---|
505 | |
---|
506 | `-mcall-sysv-noeabi' |
---|
507 | Specify both `-mcall-sysv' and `-mno-eabi' options. |
---|
508 | |
---|
509 | `-mcall-aix' |
---|
510 | On System V.4 and embedded PowerPC systems compile code using |
---|
511 | calling conventions that are similar to those used on AIX. This |
---|
512 | is the default if you configured GCC using `powerpc-*-eabiaix'. |
---|
513 | |
---|
514 | `-mcall-solaris' |
---|
515 | On System V.4 and embedded PowerPC systems compile code for the |
---|
516 | Solaris operating system. |
---|
517 | |
---|
518 | `-mcall-linux' |
---|
519 | On System V.4 and embedded PowerPC systems compile code for the |
---|
520 | Linux-based GNU system. |
---|
521 | |
---|
522 | `-mprototype' |
---|
523 | `-mno-prototype' |
---|
524 | On System V.4 and embedded PowerPC systems assume that all calls to |
---|
525 | variable argument functions are properly prototyped. Otherwise, |
---|
526 | the compiler must insert an instruction before every non |
---|
527 | prototyped call to set or clear bit 6 of the condition code |
---|
528 | register (CR) to indicate whether floating point values were |
---|
529 | passed in the floating point registers in case the function takes |
---|
530 | a variable arguments. With `-mprototype', only calls to |
---|
531 | prototyped variable argument functions will set or clear the bit. |
---|
532 | |
---|
533 | `-msim' |
---|
534 | On embedded PowerPC systems, assume that the startup module is |
---|
535 | called `sim-crt0.o' and that the standard C libraries are |
---|
536 | `libsim.a' and `libc.a'. This is the default for |
---|
537 | `powerpc-*-eabisim'. configurations. |
---|
538 | |
---|
539 | `-mmvme' |
---|
540 | On embedded PowerPC systems, assume that the startup module is |
---|
541 | called `crt0.o' and the standard C libraries are `libmvme.a' and |
---|
542 | `libc.a'. |
---|
543 | |
---|
544 | `-mads' |
---|
545 | On embedded PowerPC systems, assume that the startup module is |
---|
546 | called `crt0.o' and the standard C libraries are `libads.a' and |
---|
547 | `libc.a'. |
---|
548 | |
---|
549 | `-myellowknife' |
---|
550 | On embedded PowerPC systems, assume that the startup module is |
---|
551 | called `crt0.o' and the standard C libraries are `libyk.a' and |
---|
552 | `libc.a'. |
---|
553 | |
---|
554 | `-memb' |
---|
555 | On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags |
---|
556 | header to indicate that `eabi' extended relocations are used. |
---|
557 | |
---|
558 | `-meabi' |
---|
559 | `-mno-eabi' |
---|
560 | On System V.4 and embedded PowerPC systems do (do not) adhere to |
---|
561 | the Embedded Applications Binary Interface (eabi) which is a set of |
---|
562 | modifications to the System V.4 specifications. Selecting `-meabi' |
---|
563 | means that the stack is aligned to an 8 byte boundary, a function |
---|
564 | `__eabi' is called to from `main' to set up the eabi environment, |
---|
565 | and the `-msdata' option can use both `r2' and `r13' to point to |
---|
566 | two separate small data areas. Selecting `-mno-eabi' means that |
---|
567 | the stack is aligned to a 16 byte boundary, do not call an |
---|
568 | initialization function from `main', and the `-msdata' option will |
---|
569 | only use `r13' to point to a single small data area. The `-meabi' |
---|
570 | option is on by default if you configured GCC using one of the |
---|
571 | `powerpc*-*-eabi*' options. |
---|
572 | |
---|
573 | `-msdata=eabi' |
---|
574 | On System V.4 and embedded PowerPC systems, put small initialized |
---|
575 | `const' global and static data in the `.sdata2' section, which is |
---|
576 | pointed to by register `r2'. Put small initialized non-`const' |
---|
577 | global and static data in the `.sdata' section, which is pointed |
---|
578 | to by register `r13'. Put small uninitialized global and static |
---|
579 | data in the `.sbss' section, which is adjacent to the `.sdata' |
---|
580 | section. The `-msdata=eabi' option is incompatible with the |
---|
581 | `-mrelocatable' option. The `-msdata=eabi' option also sets the |
---|
582 | `-memb' option. |
---|
583 | |
---|
584 | `-msdata=sysv' |
---|
585 | On System V.4 and embedded PowerPC systems, put small global and |
---|
586 | static data in the `.sdata' section, which is pointed to by |
---|
587 | register `r13'. Put small uninitialized global and static data in |
---|
588 | the `.sbss' section, which is adjacent to the `.sdata' section. |
---|
589 | The `-msdata=sysv' option is incompatible with the `-mrelocatable' |
---|
590 | option. |
---|
591 | |
---|
592 | `-msdata=default' |
---|
593 | `-msdata' |
---|
594 | On System V.4 and embedded PowerPC systems, if `-meabi' is used, |
---|
595 | compile code the same as `-msdata=eabi', otherwise compile code the |
---|
596 | same as `-msdata=sysv'. |
---|
597 | |
---|
598 | `-msdata-data' |
---|
599 | On System V.4 and embedded PowerPC systems, put small global and |
---|
600 | static data in the `.sdata' section. Put small uninitialized |
---|
601 | global and static data in the `.sbss' section. Do not use |
---|
602 | register `r13' to address small data however. This is the default |
---|
603 | behavior unless other `-msdata' options are used. |
---|
604 | |
---|
605 | `-msdata=none' |
---|
606 | `-mno-sdata' |
---|
607 | On embedded PowerPC systems, put all initialized global and static |
---|
608 | data in the `.data' section, and all uninitialized data in the |
---|
609 | `.bss' section. |
---|
610 | |
---|
611 | `-G NUM' |
---|
612 | On embedded PowerPC systems, put global and static items less than |
---|
613 | or equal to NUM bytes into the small data or bss sections instead |
---|
614 | of the normal data or bss section. By default, NUM is 8. The `-G |
---|
615 | NUM' switch is also passed to the linker. All modules should be |
---|
616 | compiled with the same `-G NUM' value. |
---|
617 | |
---|
618 | `-mregnames' |
---|
619 | `-mno-regnames' |
---|
620 | On System V.4 and embedded PowerPC systems do (do not) emit |
---|
621 | register names in the assembly language output using symbolic |
---|
622 | forms. |
---|
623 | |
---|
624 | |
---|
625 | File: gcc.info, Node: RT Options, Next: MIPS Options, Prev: RS/6000 and PowerPC Options, Up: Submodel Options |
---|
626 | |
---|
627 | IBM RT Options |
---|
628 | -------------- |
---|
629 | |
---|
630 | These `-m' options are defined for the IBM RT PC: |
---|
631 | |
---|
632 | `-min-line-mul' |
---|
633 | Use an in-line code sequence for integer multiplies. This is the |
---|
634 | default. |
---|
635 | |
---|
636 | `-mcall-lib-mul' |
---|
637 | Call `lmul$$' for integer multiples. |
---|
638 | |
---|
639 | `-mfull-fp-blocks' |
---|
640 | Generate full-size floating point data blocks, including the |
---|
641 | minimum amount of scratch space recommended by IBM. This is the |
---|
642 | default. |
---|
643 | |
---|
644 | `-mminimum-fp-blocks' |
---|
645 | Do not include extra scratch space in floating point data blocks. |
---|
646 | This results in smaller code, but slower execution, since scratch |
---|
647 | space must be allocated dynamically. |
---|
648 | |
---|
649 | `-mfp-arg-in-fpregs' |
---|
650 | Use a calling sequence incompatible with the IBM calling |
---|
651 | convention in which floating point arguments are passed in |
---|
652 | floating point registers. Note that `varargs.h' and `stdargs.h' |
---|
653 | will not work with floating point operands if this option is |
---|
654 | specified. |
---|
655 | |
---|
656 | `-mfp-arg-in-gregs' |
---|
657 | Use the normal calling convention for floating point arguments. |
---|
658 | This is the default. |
---|
659 | |
---|
660 | `-mhc-struct-return' |
---|
661 | Return structures of more than one word in memory, rather than in a |
---|
662 | register. This provides compatibility with the MetaWare HighC (hc) |
---|
663 | compiler. Use the option `-fpcc-struct-return' for compatibility |
---|
664 | with the Portable C Compiler (pcc). |
---|
665 | |
---|
666 | `-mnohc-struct-return' |
---|
667 | Return some structures of more than one word in registers, when |
---|
668 | convenient. This is the default. For compatibility with the |
---|
669 | IBM-supplied compilers, use the option `-fpcc-struct-return' or the |
---|
670 | option `-mhc-struct-return'. |
---|
671 | |
---|
672 | |
---|
673 | File: gcc.info, Node: MIPS Options, Next: i386 Options, Prev: RT Options, Up: Submodel Options |
---|
674 | |
---|
675 | MIPS Options |
---|
676 | ------------ |
---|
677 | |
---|
678 | These `-m' options are defined for the MIPS family of computers: |
---|
679 | |
---|
680 | `-mcpu=CPU TYPE' |
---|
681 | Assume the defaults for the machine type CPU TYPE when scheduling |
---|
682 | instructions. The choices for CPU TYPE are `r2000', `r3000', |
---|
683 | `r4000', `r4400', `r4600', and `r6000'. While picking a specific |
---|
684 | CPU TYPE will schedule things appropriately for that particular |
---|
685 | chip, the compiler will not generate any code that does not meet |
---|
686 | level 1 of the MIPS ISA (instruction set architecture) without the |
---|
687 | `-mips2' or `-mips3' switches being used. |
---|
688 | |
---|
689 | `-mips1' |
---|
690 | Issue instructions from level 1 of the MIPS ISA. This is the |
---|
691 | default. `r3000' is the default CPU TYPE at this ISA level. |
---|
692 | |
---|
693 | `-mips2' |
---|
694 | Issue instructions from level 2 of the MIPS ISA (branch likely, |
---|
695 | square root instructions). `r6000' is the default CPU TYPE at this |
---|
696 | ISA level. |
---|
697 | |
---|
698 | `-mips3' |
---|
699 | Issue instructions from level 3 of the MIPS ISA (64 bit |
---|
700 | instructions). `r4000' is the default CPU TYPE at this ISA level. |
---|
701 | This option does not change the sizes of any of the C data types. |
---|
702 | |
---|
703 | `-mfp32' |
---|
704 | Assume that 32 32-bit floating point registers are available. |
---|
705 | This is the default. |
---|
706 | |
---|
707 | `-mfp64' |
---|
708 | Assume that 32 64-bit floating point registers are available. |
---|
709 | This is the default when the `-mips3' option is used. |
---|
710 | |
---|
711 | `-mgp32' |
---|
712 | Assume that 32 32-bit general purpose registers are available. |
---|
713 | This is the default. |
---|
714 | |
---|
715 | `-mgp64' |
---|
716 | Assume that 32 64-bit general purpose registers are available. |
---|
717 | This is the default when the `-mips3' option is used. |
---|
718 | |
---|
719 | `-mint64' |
---|
720 | Types long, int, and pointer are 64 bits. This works only if |
---|
721 | `-mips3' is also specified. |
---|
722 | |
---|
723 | `-mlong64' |
---|
724 | Types long and pointer are 64 bits, and type int is 32 bits. This |
---|
725 | works only if `-mips3' is also specified. |
---|
726 | |
---|
727 | `-mmips-as' |
---|
728 | Generate code for the MIPS assembler, and invoke `mips-tfile' to |
---|
729 | add normal debug information. This is the default for all |
---|
730 | platforms except for the OSF/1 reference platform, using the |
---|
731 | OSF/rose object format. If the either of the `-gstabs' or |
---|
732 | `-gstabs+' switches are used, the `mips-tfile' program will |
---|
733 | encapsulate the stabs within MIPS ECOFF. |
---|
734 | |
---|
735 | `-mgas' |
---|
736 | Generate code for the GNU assembler. This is the default on the |
---|
737 | OSF/1 reference platform, using the OSF/rose object format. Also, |
---|
738 | this is the default if the configure option `--with-gnu-as' is |
---|
739 | used. |
---|
740 | |
---|
741 | `-msplit-addresses' |
---|
742 | `-mno-split-addresses' |
---|
743 | Generate code to load the high and low parts of address constants |
---|
744 | separately. This allows `gcc' to optimize away redundant loads of |
---|
745 | the high order bits of addresses. This optimization requires GNU |
---|
746 | as and GNU ld. This optimization is enabled by default for some |
---|
747 | embedded targets where GNU as and GNU ld are standard. |
---|
748 | |
---|
749 | `-mrnames' |
---|
750 | `-mno-rnames' |
---|
751 | The `-mrnames' switch says to output code using the MIPS software |
---|
752 | names for the registers, instead of the hardware names (ie, A0 |
---|
753 | instead of $4). The only known assembler that supports this option |
---|
754 | is the Algorithmics assembler. |
---|
755 | |
---|
756 | `-mgpopt' |
---|
757 | `-mno-gpopt' |
---|
758 | The `-mgpopt' switch says to write all of the data declarations |
---|
759 | before the instructions in the text section, this allows the MIPS |
---|
760 | assembler to generate one word memory references instead of using |
---|
761 | two words for short global or static data items. This is on by |
---|
762 | default if optimization is selected. |
---|
763 | |
---|
764 | `-mstats' |
---|
765 | `-mno-stats' |
---|
766 | For each non-inline function processed, the `-mstats' switch |
---|
767 | causes the compiler to emit one line to the standard error file to |
---|
768 | print statistics about the program (number of registers saved, |
---|
769 | stack size, etc.). |
---|
770 | |
---|
771 | `-mmemcpy' |
---|
772 | `-mno-memcpy' |
---|
773 | The `-mmemcpy' switch makes all block moves call the appropriate |
---|
774 | string function (`memcpy' or `bcopy') instead of possibly |
---|
775 | generating inline code. |
---|
776 | |
---|
777 | `-mmips-tfile' |
---|
778 | `-mno-mips-tfile' |
---|
779 | The `-mno-mips-tfile' switch causes the compiler not postprocess |
---|
780 | the object file with the `mips-tfile' program, after the MIPS |
---|
781 | assembler has generated it to add debug support. If `mips-tfile' |
---|
782 | is not run, then no local variables will be available to the |
---|
783 | debugger. In addition, `stage2' and `stage3' objects will have |
---|
784 | the temporary file names passed to the assembler embedded in the |
---|
785 | object file, which means the objects will not compare the same. |
---|
786 | The `-mno-mips-tfile' switch should only be used when there are |
---|
787 | bugs in the `mips-tfile' program that prevents compilation. |
---|
788 | |
---|
789 | `-msoft-float' |
---|
790 | Generate output containing library calls for floating point. |
---|
791 | *Warning:* the requisite libraries are not part of GNU CC. |
---|
792 | Normally the facilities of the machine's usual C compiler are |
---|
793 | used, but this can't be done directly in cross-compilation. You |
---|
794 | must make your own arrangements to provide suitable library |
---|
795 | functions for cross-compilation. |
---|
796 | |
---|
797 | `-mhard-float' |
---|
798 | Generate output containing floating point instructions. This is |
---|
799 | the default if you use the unmodified sources. |
---|
800 | |
---|
801 | `-mabicalls' |
---|
802 | `-mno-abicalls' |
---|
803 | Emit (or do not emit) the pseudo operations `.abicalls', |
---|
804 | `.cpload', and `.cprestore' that some System V.4 ports use for |
---|
805 | position independent code. |
---|
806 | |
---|
807 | `-mlong-calls' |
---|
808 | `-mno-long-calls' |
---|
809 | Do all calls with the `JALR' instruction, which requires loading |
---|
810 | up a function's address into a register before the call. You need |
---|
811 | to use this switch, if you call outside of the current 512 |
---|
812 | megabyte segment to functions that are not through pointers. |
---|
813 | |
---|
814 | `-mhalf-pic' |
---|
815 | `-mno-half-pic' |
---|
816 | Put pointers to extern references into the data section and load |
---|
817 | them up, rather than put the references in the text section. |
---|
818 | |
---|
819 | `-membedded-pic' |
---|
820 | `-mno-embedded-pic' |
---|
821 | Generate PIC code suitable for some embedded systems. All calls |
---|
822 | are made using PC relative address, and all data is addressed |
---|
823 | using the $gp register. This requires GNU as and GNU ld which do |
---|
824 | most of the work. |
---|
825 | |
---|
826 | `-membedded-data' |
---|
827 | `-mno-embedded-data' |
---|
828 | Allocate variables to the read-only data section first if |
---|
829 | possible, then next in the small data section if possible, |
---|
830 | otherwise in data. This gives slightly slower code than the |
---|
831 | default, but reduces the amount of RAM required when executing, |
---|
832 | and thus may be preferred for some embedded systems. |
---|
833 | |
---|
834 | `-msingle-float' |
---|
835 | `-mdouble-float' |
---|
836 | The `-msingle-float' switch tells gcc to assume that the floating |
---|
837 | point coprocessor only supports single precision operations, as on |
---|
838 | the `r4650' chip. The `-mdouble-float' switch permits gcc to use |
---|
839 | double precision operations. This is the default. |
---|
840 | |
---|
841 | `-mmad' |
---|
842 | `-mno-mad' |
---|
843 | Permit use of the `mad', `madu' and `mul' instructions, as on the |
---|
844 | `r4650' chip. |
---|
845 | |
---|
846 | `-m4650' |
---|
847 | Turns on `-msingle-float', `-mmad', and, at least for now, |
---|
848 | `-mcpu=r4650'. |
---|
849 | |
---|
850 | `-EL' |
---|
851 | Compile code for the processor in little endian mode. The |
---|
852 | requisite libraries are assumed to exist. |
---|
853 | |
---|
854 | `-EB' |
---|
855 | Compile code for the processor in big endian mode. The requisite |
---|
856 | libraries are assumed to exist. |
---|
857 | |
---|
858 | `-G NUM' |
---|
859 | Put global and static items less than or equal to NUM bytes into |
---|
860 | the small data or bss sections instead of the normal data or bss |
---|
861 | section. This allows the assembler to emit one word memory |
---|
862 | reference instructions based on the global pointer (GP or $28), |
---|
863 | instead of the normal two words used. By default, NUM is 8 when |
---|
864 | the MIPS assembler is used, and 0 when the GNU assembler is used. |
---|
865 | The `-G NUM' switch is also passed to the assembler and linker. |
---|
866 | All modules should be compiled with the same `-G NUM' value. |
---|
867 | |
---|
868 | `-nocpp' |
---|
869 | Tell the MIPS assembler to not run it's preprocessor over user |
---|
870 | assembler files (with a `.s' suffix) when assembling them. |
---|
871 | |
---|
872 | These options are defined by the macro `TARGET_SWITCHES' in the |
---|
873 | machine description. The default for the options is also defined by |
---|
874 | that macro, which enables you to change the defaults. |
---|
875 | |
---|
876 | |
---|
877 | File: gcc.info, Node: i386 Options, Next: HPPA Options, Prev: MIPS Options, Up: Submodel Options |
---|
878 | |
---|
879 | Intel 386 Options |
---|
880 | ----------------- |
---|
881 | |
---|
882 | These `-m' options are defined for the i386 family of computers: |
---|
883 | |
---|
884 | `-mcpu=CPU TYPE' |
---|
885 | Assume the defaults for the machine type CPU TYPE when scheduling |
---|
886 | instructions. The choices for CPU TYPE are: `i386', `i486', |
---|
887 | `i586' (`pentium'), `pentium', `i686' (`pentiumpro') and |
---|
888 | `pentiumpro'. While picking a specific CPU TYPE will schedule |
---|
889 | things appropriately for that particular chip, the compiler will |
---|
890 | not generate any code that does not run on the i386 without the |
---|
891 | `-march=CPU TYPE' option being used. |
---|
892 | |
---|
893 | `-march=CPU TYPE' |
---|
894 | Generate instructions for the machine type CPU TYPE. The choices |
---|
895 | for CPU TYPE are: `i386', `i486', `pentium', and `pentiumpro'. |
---|
896 | Specifying `-march=CPU TYPE' implies `-mcpu=CPU TYPE'. |
---|
897 | |
---|
898 | `-m386' |
---|
899 | `-m486' |
---|
900 | `-mpentium' |
---|
901 | `-mpentiumpro' |
---|
902 | Synonyms for -mcpu=i386, -mcpu=i486, -mcpu=pentium, and |
---|
903 | -mcpu=pentiumpro respectively. |
---|
904 | |
---|
905 | `-mieee-fp' |
---|
906 | `-mno-ieee-fp' |
---|
907 | Control whether or not the compiler uses IEEE floating point |
---|
908 | comparisons. These handle correctly the case where the result of a |
---|
909 | comparison is unordered. |
---|
910 | |
---|
911 | `-msoft-float' |
---|
912 | Generate output containing library calls for floating point. |
---|
913 | *Warning:* the requisite libraries are not part of GNU CC. |
---|
914 | Normally the facilities of the machine's usual C compiler are |
---|
915 | used, but this can't be done directly in cross-compilation. You |
---|
916 | must make your own arrangements to provide suitable library |
---|
917 | functions for cross-compilation. |
---|
918 | |
---|
919 | On machines where a function returns floating point results in the |
---|
920 | 80387 register stack, some floating point opcodes may be emitted |
---|
921 | even if `-msoft-float' is used. |
---|
922 | |
---|
923 | `-mno-fp-ret-in-387' |
---|
924 | Do not use the FPU registers for return values of functions. |
---|
925 | |
---|
926 | The usual calling convention has functions return values of types |
---|
927 | `float' and `double' in an FPU register, even if there is no FPU. |
---|
928 | The idea is that the operating system should emulate an FPU. |
---|
929 | |
---|
930 | The option `-mno-fp-ret-in-387' causes such values to be returned |
---|
931 | in ordinary CPU registers instead. |
---|
932 | |
---|
933 | `-mno-fancy-math-387' |
---|
934 | Some 387 emulators do not support the `sin', `cos' and `sqrt' |
---|
935 | instructions for the 387. Specify this option to avoid generating |
---|
936 | those instructions. This option is the default on FreeBSD. As of |
---|
937 | revision 2.6.1, these instructions are not generated unless you |
---|
938 | also use the `-ffast-math' switch. |
---|
939 | |
---|
940 | `-malign-double' |
---|
941 | `-mno-align-double' |
---|
942 | Control whether GNU CC aligns `double', `long double', and `long |
---|
943 | long' variables on a two word boundary or a one word boundary. |
---|
944 | Aligning `double' variables on a two word boundary will produce |
---|
945 | code that runs somewhat faster on a `Pentium' at the expense of |
---|
946 | more memory. |
---|
947 | |
---|
948 | *Warning:* if you use the `-malign-double' switch, structures |
---|
949 | containing the above types will be aligned differently than the |
---|
950 | published application binary interface specifications for the 386. |
---|
951 | |
---|
952 | `-msvr3-shlib' |
---|
953 | `-mno-svr3-shlib' |
---|
954 | Control whether GNU CC places uninitialized locals into `bss' or |
---|
955 | `data'. `-msvr3-shlib' places these locals into `bss'. These |
---|
956 | options are meaningful only on System V Release 3. |
---|
957 | |
---|
958 | `-mno-wide-multiply' |
---|
959 | `-mwide-multiply' |
---|
960 | Control whether GNU CC uses the `mul' and `imul' that produce 64 |
---|
961 | bit results in `eax:edx' from 32 bit operands to do `long long' |
---|
962 | multiplies and 32-bit division by constants. |
---|
963 | |
---|
964 | `-mrtd' |
---|
965 | Use a different function-calling convention, in which functions |
---|
966 | that take a fixed number of arguments return with the `ret' NUM |
---|
967 | instruction, which pops their arguments while returning. This |
---|
968 | saves one instruction in the caller since there is no need to pop |
---|
969 | the arguments there. |
---|
970 | |
---|
971 | You can specify that an individual function is called with this |
---|
972 | calling sequence with the function attribute `stdcall'. You can |
---|
973 | also override the `-mrtd' option by using the function attribute |
---|
974 | `cdecl'. *Note Function Attributes:: |
---|
975 | |
---|
976 | *Warning:* this calling convention is incompatible with the one |
---|
977 | normally used on Unix, so you cannot use it if you need to call |
---|
978 | libraries compiled with the Unix compiler. |
---|
979 | |
---|
980 | Also, you must provide function prototypes for all functions that |
---|
981 | take variable numbers of arguments (including `printf'); otherwise |
---|
982 | incorrect code will be generated for calls to those functions. |
---|
983 | |
---|
984 | In addition, seriously incorrect code will result if you call a |
---|
985 | function with too many arguments. (Normally, extra arguments are |
---|
986 | harmlessly ignored.) |
---|
987 | |
---|
988 | `-mreg-alloc=REGS' |
---|
989 | Control the default allocation order of integer registers. The |
---|
990 | string REGS is a series of letters specifying a register. The |
---|
991 | supported letters are: `a' allocate EAX; `b' allocate EBX; `c' |
---|
992 | allocate ECX; `d' allocate EDX; `S' allocate ESI; `D' allocate |
---|
993 | EDI; `B' allocate EBP. |
---|
994 | |
---|
995 | `-mregparm=NUM' |
---|
996 | Control how many registers are used to pass integer arguments. By |
---|
997 | default, no registers are used to pass arguments, and at most 3 |
---|
998 | registers can be used. You can control this behavior for a |
---|
999 | specific function by using the function attribute `regparm'. |
---|
1000 | *Note Function Attributes:: |
---|
1001 | |
---|
1002 | *Warning:* if you use this switch, and NUM is nonzero, then you |
---|
1003 | must build all modules with the same value, including any |
---|
1004 | libraries. This includes the system libraries and startup modules. |
---|
1005 | |
---|
1006 | `-malign-loops=NUM' |
---|
1007 | Align loops to a 2 raised to a NUM byte boundary. If |
---|
1008 | `-malign-loops' is not specified, the default is 2. |
---|
1009 | |
---|
1010 | `-malign-jumps=NUM' |
---|
1011 | Align instructions that are only jumped to to a 2 raised to a NUM |
---|
1012 | byte boundary. If `-malign-jumps' is not specified, the default is |
---|
1013 | 2 if optimizing for a 386, and 4 if optimizing for a 486. |
---|
1014 | |
---|
1015 | `-malign-functions=NUM' |
---|
1016 | Align the start of functions to a 2 raised to NUM byte boundary. |
---|
1017 | If `-malign-functions' is not specified, the default is 2 if |
---|
1018 | optimizing for a 386, and 4 if optimizing for a 486. |
---|
1019 | |
---|
1020 | |
---|
1021 | File: gcc.info, Node: HPPA Options, Next: Intel 960 Options, Prev: i386 Options, Up: Submodel Options |
---|
1022 | |
---|
1023 | HPPA Options |
---|
1024 | ------------ |
---|
1025 | |
---|
1026 | These `-m' options are defined for the HPPA family of computers: |
---|
1027 | |
---|
1028 | `-mpa-risc-1-0' |
---|
1029 | Generate code for a PA 1.0 processor. |
---|
1030 | |
---|
1031 | `-mpa-risc-1-1' |
---|
1032 | Generate code for a PA 1.1 processor. |
---|
1033 | |
---|
1034 | `-mbig-switch' |
---|
1035 | Generate code suitable for big switch tables. Use this option |
---|
1036 | only if the assembler/linker complain about out of range branches |
---|
1037 | within a switch table. |
---|
1038 | |
---|
1039 | `-mjump-in-delay' |
---|
1040 | Fill delay slots of function calls with unconditional jump |
---|
1041 | instructions by modifying the return pointer for the function call |
---|
1042 | to be the target of the conditional jump. |
---|
1043 | |
---|
1044 | `-mdisable-fpregs' |
---|
1045 | Prevent floating point registers from being used in any manner. |
---|
1046 | This is necessary for compiling kernels which perform lazy context |
---|
1047 | switching of floating point registers. If you use this option and |
---|
1048 | attempt to perform floating point operations, the compiler will |
---|
1049 | abort. |
---|
1050 | |
---|
1051 | `-mdisable-indexing' |
---|
1052 | Prevent the compiler from using indexing address modes. This |
---|
1053 | avoids some rather obscure problems when compiling MIG generated |
---|
1054 | code under MACH. |
---|
1055 | |
---|
1056 | `-mno-space-regs' |
---|
1057 | Generate code that assumes the target has no space registers. |
---|
1058 | This allows GCC to generate faster indirect calls and use unscaled |
---|
1059 | index address modes. |
---|
1060 | |
---|
1061 | Such code is suitable for level 0 PA systems and kernels. |
---|
1062 | |
---|
1063 | `-mfast-indirect-calls' |
---|
1064 | Generate code that assumes calls never cross space boundaries. |
---|
1065 | This allows GCC to emit code which performs faster indirect calls. |
---|
1066 | |
---|
1067 | This option will not work in the presense of shared libraries or |
---|
1068 | nested functions. |
---|
1069 | |
---|
1070 | `-mspace' |
---|
1071 | Optimize for space rather than execution time. Currently this only |
---|
1072 | enables out of line function prologues and epilogues. This option |
---|
1073 | is incompatible with PIC code generation and profiling. |
---|
1074 | |
---|
1075 | `-mlong-load-store' |
---|
1076 | Generate 3-instruction load and store sequences as sometimes |
---|
1077 | required by the HP-UX 10 linker. This is equivalent to the `+k' |
---|
1078 | option to the HP compilers. |
---|
1079 | |
---|
1080 | `-mportable-runtime' |
---|
1081 | Use the portable calling conventions proposed by HP for ELF |
---|
1082 | systems. |
---|
1083 | |
---|
1084 | `-mgas' |
---|
1085 | Enable the use of assembler directives only GAS understands. |
---|
1086 | |
---|
1087 | `-mschedule=CPU TYPE' |
---|
1088 | Schedule code according to the constraints for the machine type |
---|
1089 | CPU TYPE. The choices for CPU TYPE are `700' for 7N0 machines, |
---|
1090 | `7100' for 7N5 machines, and `7100' for 7N2 machines. `7100' is |
---|
1091 | the default for CPU TYPE. |
---|
1092 | |
---|
1093 | Note the `7100LC' scheduling information is incomplete and using |
---|
1094 | `7100LC' often leads to bad schedules. For now it's probably best |
---|
1095 | to use `7100' instead of `7100LC' for the 7N2 machines. |
---|
1096 | |
---|
1097 | `-mlinker-opt' |
---|
1098 | Enable the optimization pass in the HPUX linker. Note this makes |
---|
1099 | symbolic debugging impossible. It also triggers a bug in the HPUX |
---|
1100 | 8 and HPUX 9 linkers in which they give bogus error messages when |
---|
1101 | linking some programs. |
---|
1102 | |
---|
1103 | `-msoft-float' |
---|
1104 | Generate output containing library calls for floating point. |
---|
1105 | *Warning:* the requisite libraries are not available for all HPPA |
---|
1106 | targets. Normally the facilities of the machine's usual C |
---|
1107 | compiler are used, but this cannot be done directly in |
---|
1108 | cross-compilation. You must make your own arrangements to provide |
---|
1109 | suitable library functions for cross-compilation. The embedded |
---|
1110 | target `hppa1.1-*-pro' does provide software floating point |
---|
1111 | support. |
---|
1112 | |
---|
1113 | `-msoft-float' changes the calling convention in the output file; |
---|
1114 | therefore, it is only useful if you compile *all* of a program with |
---|
1115 | this option. In particular, you need to compile `libgcc.a', the |
---|
1116 | library that comes with GNU CC, with `-msoft-float' in order for |
---|
1117 | this to work. |
---|
1118 | |
---|
1119 | |
---|
1120 | File: gcc.info, Node: Intel 960 Options, Next: DEC Alpha Options, Prev: HPPA Options, Up: Submodel Options |
---|
1121 | |
---|
1122 | Intel 960 Options |
---|
1123 | ----------------- |
---|
1124 | |
---|
1125 | These `-m' options are defined for the Intel 960 implementations: |
---|
1126 | |
---|
1127 | `-mCPU TYPE' |
---|
1128 | Assume the defaults for the machine type CPU TYPE for some of the |
---|
1129 | other options, including instruction scheduling, floating point |
---|
1130 | support, and addressing modes. The choices for CPU TYPE are `ka', |
---|
1131 | `kb', `mc', `ca', `cf', `sa', and `sb'. The default is `kb'. |
---|
1132 | |
---|
1133 | `-mnumerics' |
---|
1134 | `-msoft-float' |
---|
1135 | The `-mnumerics' option indicates that the processor does support |
---|
1136 | floating-point instructions. The `-msoft-float' option indicates |
---|
1137 | that floating-point support should not be assumed. |
---|
1138 | |
---|
1139 | `-mleaf-procedures' |
---|
1140 | `-mno-leaf-procedures' |
---|
1141 | Do (or do not) attempt to alter leaf procedures to be callable |
---|
1142 | with the `bal' instruction as well as `call'. This will result in |
---|
1143 | more efficient code for explicit calls when the `bal' instruction |
---|
1144 | can be substituted by the assembler or linker, but less efficient |
---|
1145 | code in other cases, such as calls via function pointers, or using |
---|
1146 | a linker that doesn't support this optimization. |
---|
1147 | |
---|
1148 | `-mtail-call' |
---|
1149 | `-mno-tail-call' |
---|
1150 | Do (or do not) make additional attempts (beyond those of the |
---|
1151 | machine-independent portions of the compiler) to optimize |
---|
1152 | tail-recursive calls into branches. You may not want to do this |
---|
1153 | because the detection of cases where this is not valid is not |
---|
1154 | totally complete. The default is `-mno-tail-call'. |
---|
1155 | |
---|
1156 | `-mcomplex-addr' |
---|
1157 | `-mno-complex-addr' |
---|
1158 | Assume (or do not assume) that the use of a complex addressing |
---|
1159 | mode is a win on this implementation of the i960. Complex |
---|
1160 | addressing modes may not be worthwhile on the K-series, but they |
---|
1161 | definitely are on the C-series. The default is currently |
---|
1162 | `-mcomplex-addr' for all processors except the CB and CC. |
---|
1163 | |
---|
1164 | `-mcode-align' |
---|
1165 | `-mno-code-align' |
---|
1166 | Align code to 8-byte boundaries for faster fetching (or don't |
---|
1167 | bother). Currently turned on by default for C-series |
---|
1168 | implementations only. |
---|
1169 | |
---|
1170 | `-mic-compat' |
---|
1171 | `-mic2.0-compat' |
---|
1172 | `-mic3.0-compat' |
---|
1173 | Enable compatibility with iC960 v2.0 or v3.0. |
---|
1174 | |
---|
1175 | `-masm-compat' |
---|
1176 | `-mintel-asm' |
---|
1177 | Enable compatibility with the iC960 assembler. |
---|
1178 | |
---|
1179 | `-mstrict-align' |
---|
1180 | `-mno-strict-align' |
---|
1181 | Do not permit (do permit) unaligned accesses. |
---|
1182 | |
---|
1183 | `-mold-align' |
---|
1184 | Enable structure-alignment compatibility with Intel's gcc release |
---|
1185 | version 1.3 (based on gcc 1.37). This option implies |
---|
1186 | `-mstrict-align'. |
---|
1187 | |
---|