1 | /* Analyze RTL for C-Compiler |
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2 | Copyright (C) 1987, 88, 91, 92, 93, 94, 1995 Free Software Foundation, Inc. |
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3 | |
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4 | This file is part of GNU CC. |
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5 | |
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6 | GNU CC is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 2, or (at your option) |
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9 | any later version. |
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10 | |
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11 | GNU CC is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |
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16 | You should have received a copy of the GNU General Public License |
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17 | along with GNU CC; see the file COPYING. If not, write to |
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18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
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19 | Boston, MA 02111-1307, USA. */ |
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20 | |
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21 | |
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22 | #include "config.h" |
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23 | #include "rtl.h" |
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24 | |
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25 | void note_stores (); |
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26 | int reg_set_p (); |
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27 | |
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28 | /* Bit flags that specify the machine subtype we are compiling for. |
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29 | Bits are tested using macros TARGET_... defined in the tm.h file |
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30 | and set by `-m...' switches. Must be defined in rtlanal.c. */ |
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31 | |
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32 | int target_flags; |
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33 | |
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34 | /* Return 1 if the value of X is unstable |
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35 | (would be different at a different point in the program). |
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36 | The frame pointer, arg pointer, etc. are considered stable |
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37 | (within one function) and so is anything marked `unchanging'. */ |
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38 | |
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39 | int |
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40 | rtx_unstable_p (x) |
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41 | rtx x; |
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42 | { |
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43 | register RTX_CODE code = GET_CODE (x); |
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44 | register int i; |
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45 | register char *fmt; |
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46 | |
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47 | if (code == MEM) |
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48 | return ! RTX_UNCHANGING_P (x); |
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49 | |
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50 | if (code == QUEUED) |
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51 | return 1; |
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52 | |
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53 | if (code == CONST || code == CONST_INT) |
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54 | return 0; |
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55 | |
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56 | if (code == REG) |
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57 | return ! (REGNO (x) == FRAME_POINTER_REGNUM |
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58 | || REGNO (x) == HARD_FRAME_POINTER_REGNUM |
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59 | || REGNO (x) == ARG_POINTER_REGNUM |
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60 | || RTX_UNCHANGING_P (x)); |
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61 | |
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62 | fmt = GET_RTX_FORMAT (code); |
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63 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
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64 | if (fmt[i] == 'e') |
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65 | if (rtx_unstable_p (XEXP (x, i))) |
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66 | return 1; |
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67 | return 0; |
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68 | } |
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69 | |
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70 | /* Return 1 if X has a value that can vary even between two |
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71 | executions of the program. 0 means X can be compared reliably |
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72 | against certain constants or near-constants. |
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73 | The frame pointer and the arg pointer are considered constant. */ |
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74 | |
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75 | int |
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76 | rtx_varies_p (x) |
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77 | rtx x; |
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78 | { |
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79 | register RTX_CODE code = GET_CODE (x); |
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80 | register int i; |
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81 | register char *fmt; |
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82 | |
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83 | switch (code) |
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84 | { |
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85 | case MEM: |
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86 | case QUEUED: |
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87 | return 1; |
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88 | |
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89 | case CONST: |
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90 | case CONST_INT: |
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91 | case CONST_DOUBLE: |
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92 | case SYMBOL_REF: |
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93 | case LABEL_REF: |
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94 | return 0; |
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95 | |
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96 | case REG: |
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97 | /* Note that we have to test for the actual rtx used for the frame |
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98 | and arg pointers and not just the register number in case we have |
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99 | eliminated the frame and/or arg pointer and are using it |
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100 | for pseudos. */ |
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101 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
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102 | || x == arg_pointer_rtx); |
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103 | |
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104 | case LO_SUM: |
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105 | /* The operand 0 of a LO_SUM is considered constant |
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106 | (in fact is it related specifically to operand 1). */ |
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107 | return rtx_varies_p (XEXP (x, 1)); |
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108 | } |
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109 | |
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110 | fmt = GET_RTX_FORMAT (code); |
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111 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
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112 | if (fmt[i] == 'e') |
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113 | if (rtx_varies_p (XEXP (x, i))) |
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114 | return 1; |
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115 | return 0; |
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116 | } |
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117 | |
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118 | /* Return 0 if the use of X as an address in a MEM can cause a trap. */ |
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119 | |
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120 | int |
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121 | rtx_addr_can_trap_p (x) |
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122 | register rtx x; |
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123 | { |
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124 | register enum rtx_code code = GET_CODE (x); |
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125 | |
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126 | switch (code) |
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127 | { |
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128 | case SYMBOL_REF: |
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129 | case LABEL_REF: |
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130 | /* SYMBOL_REF is problematic due to the possible presence of |
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131 | a #pragma weak, but to say that loads from symbols can trap is |
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132 | *very* costly. It's not at all clear what's best here. For |
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133 | now, we ignore the impact of #pragma weak. */ |
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134 | return 0; |
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135 | |
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136 | case REG: |
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137 | /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */ |
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138 | return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx |
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139 | || x == stack_pointer_rtx || x == arg_pointer_rtx); |
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140 | |
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141 | case CONST: |
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142 | return rtx_addr_can_trap_p (XEXP (x, 0)); |
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143 | |
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144 | case PLUS: |
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145 | /* An address is assumed not to trap if it is an address that can't |
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146 | trap plus a constant integer. */ |
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147 | return (rtx_addr_can_trap_p (XEXP (x, 0)) |
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148 | || GET_CODE (XEXP (x, 1)) != CONST_INT); |
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149 | |
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150 | case LO_SUM: |
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151 | return rtx_addr_can_trap_p (XEXP (x, 1)); |
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152 | } |
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153 | |
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154 | /* If it isn't one of the case above, it can cause a trap. */ |
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155 | return 1; |
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156 | } |
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157 | |
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158 | /* Return 1 if X refers to a memory location whose address |
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159 | cannot be compared reliably with constant addresses, |
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160 | or if X refers to a BLKmode memory object. */ |
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161 | |
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162 | int |
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163 | rtx_addr_varies_p (x) |
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164 | rtx x; |
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165 | { |
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166 | register enum rtx_code code; |
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167 | register int i; |
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168 | register char *fmt; |
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169 | |
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170 | if (x == 0) |
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171 | return 0; |
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172 | |
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173 | code = GET_CODE (x); |
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174 | if (code == MEM) |
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175 | return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0)); |
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176 | |
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177 | fmt = GET_RTX_FORMAT (code); |
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178 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
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179 | if (fmt[i] == 'e') |
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180 | if (rtx_addr_varies_p (XEXP (x, i))) |
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181 | return 1; |
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182 | return 0; |
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183 | } |
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184 | |
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185 | /* Return the value of the integer term in X, if one is apparent; |
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186 | otherwise return 0. |
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187 | Only obvious integer terms are detected. |
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188 | This is used in cse.c with the `related_value' field.*/ |
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189 | |
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190 | HOST_WIDE_INT |
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191 | get_integer_term (x) |
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192 | rtx x; |
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193 | { |
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194 | if (GET_CODE (x) == CONST) |
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195 | x = XEXP (x, 0); |
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196 | |
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197 | if (GET_CODE (x) == MINUS |
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198 | && GET_CODE (XEXP (x, 1)) == CONST_INT) |
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199 | return - INTVAL (XEXP (x, 1)); |
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200 | if (GET_CODE (x) == PLUS |
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201 | && GET_CODE (XEXP (x, 1)) == CONST_INT) |
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202 | return INTVAL (XEXP (x, 1)); |
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203 | return 0; |
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204 | } |
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205 | |
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206 | /* If X is a constant, return the value sans apparent integer term; |
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207 | otherwise return 0. |
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208 | Only obvious integer terms are detected. */ |
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209 | |
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210 | rtx |
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211 | get_related_value (x) |
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212 | rtx x; |
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213 | { |
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214 | if (GET_CODE (x) != CONST) |
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215 | return 0; |
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216 | x = XEXP (x, 0); |
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217 | if (GET_CODE (x) == PLUS |
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218 | && GET_CODE (XEXP (x, 1)) == CONST_INT) |
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219 | return XEXP (x, 0); |
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220 | else if (GET_CODE (x) == MINUS |
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221 | && GET_CODE (XEXP (x, 1)) == CONST_INT) |
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222 | return XEXP (x, 0); |
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223 | return 0; |
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224 | } |
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225 | |
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226 | /* Nonzero if register REG appears somewhere within IN. |
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227 | Also works if REG is not a register; in this case it checks |
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228 | for a subexpression of IN that is Lisp "equal" to REG. */ |
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229 | |
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230 | int |
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231 | reg_mentioned_p (reg, in) |
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232 | register rtx reg, in; |
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233 | { |
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234 | register char *fmt; |
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235 | register int i; |
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236 | register enum rtx_code code; |
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237 | |
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238 | if (in == 0) |
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239 | return 0; |
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240 | |
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241 | if (reg == in) |
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242 | return 1; |
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243 | |
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244 | if (GET_CODE (in) == LABEL_REF) |
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245 | return reg == XEXP (in, 0); |
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246 | |
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247 | code = GET_CODE (in); |
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248 | |
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249 | switch (code) |
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250 | { |
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251 | /* Compare registers by number. */ |
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252 | case REG: |
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253 | return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg); |
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254 | |
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255 | /* These codes have no constituent expressions |
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256 | and are unique. */ |
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257 | case SCRATCH: |
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258 | case CC0: |
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259 | case PC: |
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260 | return 0; |
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261 | |
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262 | case CONST_INT: |
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263 | return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); |
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264 | |
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265 | case CONST_DOUBLE: |
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266 | /* These are kept unique for a given value. */ |
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267 | return 0; |
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268 | } |
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269 | |
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270 | if (GET_CODE (reg) == code && rtx_equal_p (reg, in)) |
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271 | return 1; |
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272 | |
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273 | fmt = GET_RTX_FORMAT (code); |
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274 | |
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275 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
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276 | { |
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277 | if (fmt[i] == 'E') |
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278 | { |
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279 | register int j; |
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280 | for (j = XVECLEN (in, i) - 1; j >= 0; j--) |
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281 | if (reg_mentioned_p (reg, XVECEXP (in, i, j))) |
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282 | return 1; |
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283 | } |
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284 | else if (fmt[i] == 'e' |
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285 | && reg_mentioned_p (reg, XEXP (in, i))) |
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286 | return 1; |
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287 | } |
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288 | return 0; |
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289 | } |
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290 | |
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291 | /* Return 1 if in between BEG and END, exclusive of BEG and END, there is |
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292 | no CODE_LABEL insn. */ |
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293 | |
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294 | int |
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295 | no_labels_between_p (beg, end) |
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296 | rtx beg, end; |
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297 | { |
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298 | register rtx p; |
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299 | for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) |
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300 | if (GET_CODE (p) == CODE_LABEL) |
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301 | return 0; |
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302 | return 1; |
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303 | } |
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304 | |
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305 | /* Nonzero if register REG is used in an insn between |
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306 | FROM_INSN and TO_INSN (exclusive of those two). */ |
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307 | |
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308 | int |
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309 | reg_used_between_p (reg, from_insn, to_insn) |
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310 | rtx reg, from_insn, to_insn; |
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311 | { |
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312 | register rtx insn; |
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313 | |
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314 | if (from_insn == to_insn) |
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315 | return 0; |
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316 | |
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317 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) |
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318 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' |
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319 | && (reg_overlap_mentioned_p (reg, PATTERN (insn)) |
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320 | || (GET_CODE (insn) == CALL_INSN |
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321 | && (find_reg_fusage (insn, USE, reg) |
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322 | || find_reg_fusage (insn, CLOBBER, reg))))) |
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323 | return 1; |
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324 | return 0; |
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325 | } |
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326 | |
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327 | /* Nonzero if the old value of X, a register, is referenced in BODY. If X |
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328 | is entirely replaced by a new value and the only use is as a SET_DEST, |
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329 | we do not consider it a reference. */ |
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330 | |
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331 | int |
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332 | reg_referenced_p (x, body) |
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333 | rtx x; |
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334 | rtx body; |
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335 | { |
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336 | int i; |
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337 | |
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338 | switch (GET_CODE (body)) |
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339 | { |
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340 | case SET: |
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341 | if (reg_overlap_mentioned_p (x, SET_SRC (body))) |
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342 | return 1; |
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343 | |
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344 | /* If the destination is anything other than CC0, PC, a REG or a SUBREG |
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345 | of a REG that occupies all of the REG, the insn references X if |
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346 | it is mentioned in the destination. */ |
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347 | if (GET_CODE (SET_DEST (body)) != CC0 |
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348 | && GET_CODE (SET_DEST (body)) != PC |
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349 | && GET_CODE (SET_DEST (body)) != REG |
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350 | && ! (GET_CODE (SET_DEST (body)) == SUBREG |
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351 | && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG |
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352 | && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body)))) |
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353 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) |
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354 | == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body))) |
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355 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))) |
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356 | && reg_overlap_mentioned_p (x, SET_DEST (body))) |
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357 | return 1; |
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358 | break; |
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359 | |
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360 | case ASM_OPERANDS: |
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361 | for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--) |
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362 | if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i))) |
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363 | return 1; |
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364 | break; |
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365 | |
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366 | case CALL: |
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367 | case USE: |
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368 | return reg_overlap_mentioned_p (x, body); |
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369 | |
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370 | case TRAP_IF: |
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371 | return reg_overlap_mentioned_p (x, TRAP_CONDITION (body)); |
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372 | |
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373 | case UNSPEC: |
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374 | case UNSPEC_VOLATILE: |
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375 | case PARALLEL: |
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376 | for (i = XVECLEN (body, 0) - 1; i >= 0; i--) |
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377 | if (reg_referenced_p (x, XVECEXP (body, 0, i))) |
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378 | return 1; |
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379 | break; |
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380 | } |
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381 | |
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382 | return 0; |
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383 | } |
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384 | |
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385 | /* Nonzero if register REG is referenced in an insn between |
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386 | FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do |
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387 | not count. */ |
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388 | |
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389 | int |
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390 | reg_referenced_between_p (reg, from_insn, to_insn) |
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391 | rtx reg, from_insn, to_insn; |
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392 | { |
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393 | register rtx insn; |
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394 | |
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395 | if (from_insn == to_insn) |
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396 | return 0; |
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397 | |
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398 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) |
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399 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' |
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400 | && (reg_referenced_p (reg, PATTERN (insn)) |
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401 | || (GET_CODE (insn) == CALL_INSN |
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402 | && find_reg_fusage (insn, USE, reg)))) |
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403 | return 1; |
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404 | return 0; |
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405 | } |
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406 | |
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407 | /* Nonzero if register REG is set or clobbered in an insn between |
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408 | FROM_INSN and TO_INSN (exclusive of those two). */ |
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409 | |
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410 | int |
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411 | reg_set_between_p (reg, from_insn, to_insn) |
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412 | rtx reg, from_insn, to_insn; |
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413 | { |
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414 | register rtx insn; |
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415 | |
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416 | if (from_insn == to_insn) |
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417 | return 0; |
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418 | |
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419 | for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) |
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420 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' |
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421 | && reg_set_p (reg, insn)) |
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422 | return 1; |
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423 | return 0; |
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424 | } |
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425 | |
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426 | /* Internals of reg_set_between_p. */ |
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427 | |
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428 | static rtx reg_set_reg; |
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429 | static int reg_set_flag; |
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430 | |
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431 | static void |
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432 | reg_set_p_1 (x, pat) |
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433 | rtx x; |
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434 | { |
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435 | /* We don't want to return 1 if X is a MEM that contains a register |
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436 | within REG_SET_REG. */ |
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437 | |
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438 | if ((GET_CODE (x) != MEM) |
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439 | && reg_overlap_mentioned_p (reg_set_reg, x)) |
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440 | reg_set_flag = 1; |
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441 | } |
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442 | |
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443 | int |
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444 | reg_set_p (reg, insn) |
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445 | rtx reg, insn; |
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446 | { |
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447 | rtx body = insn; |
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448 | |
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449 | /* We can be passed an insn or part of one. If we are passed an insn, |
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450 | check if a side-effect of the insn clobbers REG. */ |
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451 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
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452 | { |
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453 | if (FIND_REG_INC_NOTE (insn, reg) |
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454 | || (GET_CODE (insn) == CALL_INSN |
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455 | /* We'd like to test call_used_regs here, but rtlanal.c can't |
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456 | reference that variable due to its use in genattrtab. So |
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457 | we'll just be more conservative. |
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458 | |
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459 | ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE |
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460 | information holds all clobbered registers. */ |
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461 | && ((GET_CODE (reg) == REG |
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462 | && REGNO (reg) < FIRST_PSEUDO_REGISTER) |
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463 | || GET_CODE (reg) == MEM |
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464 | || find_reg_fusage (insn, CLOBBER, reg)))) |
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465 | return 1; |
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466 | |
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467 | body = PATTERN (insn); |
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468 | } |
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469 | |
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470 | reg_set_reg = reg; |
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471 | reg_set_flag = 0; |
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472 | note_stores (body, reg_set_p_1); |
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473 | return reg_set_flag; |
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474 | } |
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475 | |
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476 | /* Similar to reg_set_between_p, but check all registers in X. Return 0 |
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477 | only if none of them are modified between START and END. Return 1 if |
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478 | X contains a MEM; this routine does not perform any memory aliasing. */ |
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479 | |
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480 | int |
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481 | modified_between_p (x, start, end) |
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482 | rtx x; |
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483 | rtx start, end; |
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484 | { |
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485 | enum rtx_code code = GET_CODE (x); |
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486 | char *fmt; |
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487 | int i, j; |
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488 | |
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489 | switch (code) |
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490 | { |
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491 | case CONST_INT: |
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492 | case CONST_DOUBLE: |
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493 | case CONST: |
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494 | case SYMBOL_REF: |
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495 | case LABEL_REF: |
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496 | return 0; |
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497 | |
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498 | case PC: |
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499 | case CC0: |
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500 | return 1; |
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501 | |
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502 | case MEM: |
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503 | /* If the memory is not constant, assume it is modified. If it is |
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504 | constant, we still have to check the address. */ |
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505 | if (! RTX_UNCHANGING_P (x)) |
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506 | return 1; |
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507 | break; |
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508 | |
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509 | case REG: |
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510 | return reg_set_between_p (x, start, end); |
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511 | } |
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512 | |
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513 | fmt = GET_RTX_FORMAT (code); |
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514 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
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515 | { |
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516 | if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end)) |
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517 | return 1; |
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518 | |
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519 | if (fmt[i] == 'E') |
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520 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
521 | if (modified_between_p (XVECEXP (x, i, j), start, end)) |
---|
522 | return 1; |
---|
523 | } |
---|
524 | |
---|
525 | return 0; |
---|
526 | } |
---|
527 | |
---|
528 | /* Similar to reg_set_p, but check all registers in X. Return 0 only if none |
---|
529 | of them are modified in INSN. Return 1 if X contains a MEM; this routine |
---|
530 | does not perform any memory aliasing. */ |
---|
531 | |
---|
532 | int |
---|
533 | modified_in_p (x, insn) |
---|
534 | rtx x; |
---|
535 | rtx insn; |
---|
536 | { |
---|
537 | enum rtx_code code = GET_CODE (x); |
---|
538 | char *fmt; |
---|
539 | int i, j; |
---|
540 | |
---|
541 | switch (code) |
---|
542 | { |
---|
543 | case CONST_INT: |
---|
544 | case CONST_DOUBLE: |
---|
545 | case CONST: |
---|
546 | case SYMBOL_REF: |
---|
547 | case LABEL_REF: |
---|
548 | return 0; |
---|
549 | |
---|
550 | case PC: |
---|
551 | case CC0: |
---|
552 | return 1; |
---|
553 | |
---|
554 | case MEM: |
---|
555 | /* If the memory is not constant, assume it is modified. If it is |
---|
556 | constant, we still have to check the address. */ |
---|
557 | if (! RTX_UNCHANGING_P (x)) |
---|
558 | return 1; |
---|
559 | break; |
---|
560 | |
---|
561 | case REG: |
---|
562 | return reg_set_p (x, insn); |
---|
563 | } |
---|
564 | |
---|
565 | fmt = GET_RTX_FORMAT (code); |
---|
566 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
567 | { |
---|
568 | if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn)) |
---|
569 | return 1; |
---|
570 | |
---|
571 | if (fmt[i] == 'E') |
---|
572 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
573 | if (modified_in_p (XVECEXP (x, i, j), insn)) |
---|
574 | return 1; |
---|
575 | } |
---|
576 | |
---|
577 | return 0; |
---|
578 | } |
---|
579 | |
---|
580 | /* Given an INSN, return a SET expression if this insn has only a single SET. |
---|
581 | It may also have CLOBBERs, USEs, or SET whose output |
---|
582 | will not be used, which we ignore. */ |
---|
583 | |
---|
584 | rtx |
---|
585 | single_set (insn) |
---|
586 | rtx insn; |
---|
587 | { |
---|
588 | rtx set; |
---|
589 | int i; |
---|
590 | |
---|
591 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') |
---|
592 | return 0; |
---|
593 | |
---|
594 | if (GET_CODE (PATTERN (insn)) == SET) |
---|
595 | return PATTERN (insn); |
---|
596 | |
---|
597 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
---|
598 | { |
---|
599 | for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
---|
600 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET |
---|
601 | && (! find_reg_note (insn, REG_UNUSED, |
---|
602 | SET_DEST (XVECEXP (PATTERN (insn), 0, i))) |
---|
603 | || side_effects_p (XVECEXP (PATTERN (insn), 0, i)))) |
---|
604 | { |
---|
605 | if (set) |
---|
606 | return 0; |
---|
607 | else |
---|
608 | set = XVECEXP (PATTERN (insn), 0, i); |
---|
609 | } |
---|
610 | return set; |
---|
611 | } |
---|
612 | |
---|
613 | return 0; |
---|
614 | } |
---|
615 | |
---|
616 | /* Return the last thing that X was assigned from before *PINSN. Verify that |
---|
617 | the object is not modified up to VALID_TO. If it was, if we hit |
---|
618 | a partial assignment to X, or hit a CODE_LABEL first, return X. If we |
---|
619 | found an assignment, update *PINSN to point to it. */ |
---|
620 | |
---|
621 | rtx |
---|
622 | find_last_value (x, pinsn, valid_to) |
---|
623 | rtx x; |
---|
624 | rtx *pinsn; |
---|
625 | rtx valid_to; |
---|
626 | { |
---|
627 | rtx p; |
---|
628 | |
---|
629 | for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL; |
---|
630 | p = PREV_INSN (p)) |
---|
631 | if (GET_RTX_CLASS (GET_CODE (p)) == 'i') |
---|
632 | { |
---|
633 | rtx set = single_set (p); |
---|
634 | rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); |
---|
635 | |
---|
636 | if (set && rtx_equal_p (x, SET_DEST (set))) |
---|
637 | { |
---|
638 | rtx src = SET_SRC (set); |
---|
639 | |
---|
640 | if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST) |
---|
641 | src = XEXP (note, 0); |
---|
642 | |
---|
643 | if (! modified_between_p (src, PREV_INSN (p), valid_to) |
---|
644 | /* Reject hard registers because we don't usually want |
---|
645 | to use them; we'd rather use a pseudo. */ |
---|
646 | && ! (GET_CODE (src) == REG |
---|
647 | && REGNO (src) < FIRST_PSEUDO_REGISTER)) |
---|
648 | { |
---|
649 | *pinsn = p; |
---|
650 | return src; |
---|
651 | } |
---|
652 | } |
---|
653 | |
---|
654 | /* If set in non-simple way, we don't have a value. */ |
---|
655 | if (reg_set_p (x, p)) |
---|
656 | break; |
---|
657 | } |
---|
658 | |
---|
659 | return x; |
---|
660 | } |
---|
661 | |
---|
662 | /* Return nonzero if register in range [REGNO, ENDREGNO) |
---|
663 | appears either explicitly or implicitly in X |
---|
664 | other than being stored into. |
---|
665 | |
---|
666 | References contained within the substructure at LOC do not count. |
---|
667 | LOC may be zero, meaning don't ignore anything. */ |
---|
668 | |
---|
669 | int |
---|
670 | refers_to_regno_p (regno, endregno, x, loc) |
---|
671 | int regno, endregno; |
---|
672 | rtx x; |
---|
673 | rtx *loc; |
---|
674 | { |
---|
675 | register int i; |
---|
676 | register RTX_CODE code; |
---|
677 | register char *fmt; |
---|
678 | |
---|
679 | repeat: |
---|
680 | /* The contents of a REG_NONNEG note is always zero, so we must come here |
---|
681 | upon repeat in case the last REG_NOTE is a REG_NONNEG note. */ |
---|
682 | if (x == 0) |
---|
683 | return 0; |
---|
684 | |
---|
685 | code = GET_CODE (x); |
---|
686 | |
---|
687 | switch (code) |
---|
688 | { |
---|
689 | case REG: |
---|
690 | i = REGNO (x); |
---|
691 | |
---|
692 | /* If we modifying the stack, frame, or argument pointer, it will |
---|
693 | clobber a virtual register. In fact, we could be more precise, |
---|
694 | but it isn't worth it. */ |
---|
695 | if ((i == STACK_POINTER_REGNUM |
---|
696 | #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM |
---|
697 | || i == ARG_POINTER_REGNUM |
---|
698 | #endif |
---|
699 | || i == FRAME_POINTER_REGNUM) |
---|
700 | && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER) |
---|
701 | return 1; |
---|
702 | |
---|
703 | return (endregno > i |
---|
704 | && regno < i + (i < FIRST_PSEUDO_REGISTER |
---|
705 | ? HARD_REGNO_NREGS (i, GET_MODE (x)) |
---|
706 | : 1)); |
---|
707 | |
---|
708 | case SUBREG: |
---|
709 | /* If this is a SUBREG of a hard reg, we can see exactly which |
---|
710 | registers are being modified. Otherwise, handle normally. */ |
---|
711 | if (GET_CODE (SUBREG_REG (x)) == REG |
---|
712 | && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) |
---|
713 | { |
---|
714 | int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); |
---|
715 | int inner_endregno |
---|
716 | = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER |
---|
717 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); |
---|
718 | |
---|
719 | return endregno > inner_regno && regno < inner_endregno; |
---|
720 | } |
---|
721 | break; |
---|
722 | |
---|
723 | case CLOBBER: |
---|
724 | case SET: |
---|
725 | if (&SET_DEST (x) != loc |
---|
726 | /* Note setting a SUBREG counts as referring to the REG it is in for |
---|
727 | a pseudo but not for hard registers since we can |
---|
728 | treat each word individually. */ |
---|
729 | && ((GET_CODE (SET_DEST (x)) == SUBREG |
---|
730 | && loc != &SUBREG_REG (SET_DEST (x)) |
---|
731 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG |
---|
732 | && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER |
---|
733 | && refers_to_regno_p (regno, endregno, |
---|
734 | SUBREG_REG (SET_DEST (x)), loc)) |
---|
735 | || (GET_CODE (SET_DEST (x)) != REG |
---|
736 | && refers_to_regno_p (regno, endregno, SET_DEST (x), loc)))) |
---|
737 | return 1; |
---|
738 | |
---|
739 | if (code == CLOBBER || loc == &SET_SRC (x)) |
---|
740 | return 0; |
---|
741 | x = SET_SRC (x); |
---|
742 | goto repeat; |
---|
743 | } |
---|
744 | |
---|
745 | /* X does not match, so try its subexpressions. */ |
---|
746 | |
---|
747 | fmt = GET_RTX_FORMAT (code); |
---|
748 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
749 | { |
---|
750 | if (fmt[i] == 'e' && loc != &XEXP (x, i)) |
---|
751 | { |
---|
752 | if (i == 0) |
---|
753 | { |
---|
754 | x = XEXP (x, 0); |
---|
755 | goto repeat; |
---|
756 | } |
---|
757 | else |
---|
758 | if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc)) |
---|
759 | return 1; |
---|
760 | } |
---|
761 | else if (fmt[i] == 'E') |
---|
762 | { |
---|
763 | register int j; |
---|
764 | for (j = XVECLEN (x, i) - 1; j >=0; j--) |
---|
765 | if (loc != &XVECEXP (x, i, j) |
---|
766 | && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc)) |
---|
767 | return 1; |
---|
768 | } |
---|
769 | } |
---|
770 | return 0; |
---|
771 | } |
---|
772 | |
---|
773 | /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, |
---|
774 | we check if any register number in X conflicts with the relevant register |
---|
775 | numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN |
---|
776 | contains a MEM (we don't bother checking for memory addresses that can't |
---|
777 | conflict because we expect this to be a rare case. */ |
---|
778 | |
---|
779 | int |
---|
780 | reg_overlap_mentioned_p (x, in) |
---|
781 | rtx x, in; |
---|
782 | { |
---|
783 | int regno, endregno; |
---|
784 | |
---|
785 | if (GET_CODE (x) == SUBREG) |
---|
786 | { |
---|
787 | regno = REGNO (SUBREG_REG (x)); |
---|
788 | if (regno < FIRST_PSEUDO_REGISTER) |
---|
789 | regno += SUBREG_WORD (x); |
---|
790 | } |
---|
791 | else if (GET_CODE (x) == REG) |
---|
792 | regno = REGNO (x); |
---|
793 | else if (CONSTANT_P (x)) |
---|
794 | return 0; |
---|
795 | else if (GET_CODE (x) == MEM) |
---|
796 | { |
---|
797 | char *fmt; |
---|
798 | int i; |
---|
799 | |
---|
800 | if (GET_CODE (in) == MEM) |
---|
801 | return 1; |
---|
802 | |
---|
803 | fmt = GET_RTX_FORMAT (GET_CODE (in)); |
---|
804 | |
---|
805 | for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--) |
---|
806 | if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i))) |
---|
807 | return 1; |
---|
808 | |
---|
809 | return 0; |
---|
810 | } |
---|
811 | else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC |
---|
812 | || GET_CODE (x) == CC0) |
---|
813 | return reg_mentioned_p (x, in); |
---|
814 | else |
---|
815 | abort (); |
---|
816 | |
---|
817 | endregno = regno + (regno < FIRST_PSEUDO_REGISTER |
---|
818 | ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); |
---|
819 | |
---|
820 | return refers_to_regno_p (regno, endregno, in, NULL_PTR); |
---|
821 | } |
---|
822 | |
---|
823 | /* Used for communications between the next few functions. */ |
---|
824 | |
---|
825 | static int reg_set_last_unknown; |
---|
826 | static rtx reg_set_last_value; |
---|
827 | static int reg_set_last_first_regno, reg_set_last_last_regno; |
---|
828 | |
---|
829 | /* Called via note_stores from reg_set_last. */ |
---|
830 | |
---|
831 | static void |
---|
832 | reg_set_last_1 (x, pat) |
---|
833 | rtx x; |
---|
834 | rtx pat; |
---|
835 | { |
---|
836 | int first, last; |
---|
837 | |
---|
838 | /* If X is not a register, or is not one in the range we care |
---|
839 | about, ignore. */ |
---|
840 | if (GET_CODE (x) != REG) |
---|
841 | return; |
---|
842 | |
---|
843 | first = REGNO (x); |
---|
844 | last = first + (first < FIRST_PSEUDO_REGISTER |
---|
845 | ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1); |
---|
846 | |
---|
847 | if (first >= reg_set_last_last_regno |
---|
848 | || last <= reg_set_last_first_regno) |
---|
849 | return; |
---|
850 | |
---|
851 | /* If this is a CLOBBER or is some complex LHS, or doesn't modify |
---|
852 | exactly the registers we care about, show we don't know the value. */ |
---|
853 | if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x |
---|
854 | || first != reg_set_last_first_regno |
---|
855 | || last != reg_set_last_last_regno) |
---|
856 | reg_set_last_unknown = 1; |
---|
857 | else |
---|
858 | reg_set_last_value = SET_SRC (pat); |
---|
859 | } |
---|
860 | |
---|
861 | /* Return the last value to which REG was set prior to INSN. If we can't |
---|
862 | find it easily, return 0. |
---|
863 | |
---|
864 | We only return a REG, SUBREG, or constant because it is too hard to |
---|
865 | check if a MEM remains unchanged. */ |
---|
866 | |
---|
867 | rtx |
---|
868 | reg_set_last (x, insn) |
---|
869 | rtx x; |
---|
870 | rtx insn; |
---|
871 | { |
---|
872 | rtx orig_insn = insn; |
---|
873 | |
---|
874 | reg_set_last_first_regno = REGNO (x); |
---|
875 | |
---|
876 | reg_set_last_last_regno |
---|
877 | = reg_set_last_first_regno |
---|
878 | + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER |
---|
879 | ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1); |
---|
880 | |
---|
881 | reg_set_last_unknown = 0; |
---|
882 | reg_set_last_value = 0; |
---|
883 | |
---|
884 | /* Scan backwards until reg_set_last_1 changed one of the above flags. |
---|
885 | Stop when we reach a label or X is a hard reg and we reach a |
---|
886 | CALL_INSN (if reg_set_last_last_regno is a hard reg). |
---|
887 | |
---|
888 | If we find a set of X, ensure that its SET_SRC remains unchanged. */ |
---|
889 | |
---|
890 | /* We compare with <= here, because reg_set_last_last_regno |
---|
891 | is actually the number of the first reg *not* in X. */ |
---|
892 | for (; |
---|
893 | insn && GET_CODE (insn) != CODE_LABEL |
---|
894 | && ! (GET_CODE (insn) == CALL_INSN |
---|
895 | && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER); |
---|
896 | insn = PREV_INSN (insn)) |
---|
897 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
---|
898 | { |
---|
899 | note_stores (PATTERN (insn), reg_set_last_1); |
---|
900 | if (reg_set_last_unknown) |
---|
901 | return 0; |
---|
902 | else if (reg_set_last_value) |
---|
903 | { |
---|
904 | if (CONSTANT_P (reg_set_last_value) |
---|
905 | || ((GET_CODE (reg_set_last_value) == REG |
---|
906 | || GET_CODE (reg_set_last_value) == SUBREG) |
---|
907 | && ! reg_set_between_p (reg_set_last_value, |
---|
908 | insn, orig_insn))) |
---|
909 | return reg_set_last_value; |
---|
910 | else |
---|
911 | return 0; |
---|
912 | } |
---|
913 | } |
---|
914 | |
---|
915 | return 0; |
---|
916 | } |
---|
917 | |
---|
918 | /* This is 1 until after reload pass. */ |
---|
919 | int rtx_equal_function_value_matters; |
---|
920 | |
---|
921 | /* Return 1 if X and Y are identical-looking rtx's. |
---|
922 | This is the Lisp function EQUAL for rtx arguments. */ |
---|
923 | |
---|
924 | int |
---|
925 | rtx_equal_p (x, y) |
---|
926 | rtx x, y; |
---|
927 | { |
---|
928 | register int i; |
---|
929 | register int j; |
---|
930 | register enum rtx_code code; |
---|
931 | register char *fmt; |
---|
932 | |
---|
933 | if (x == y) |
---|
934 | return 1; |
---|
935 | if (x == 0 || y == 0) |
---|
936 | return 0; |
---|
937 | |
---|
938 | code = GET_CODE (x); |
---|
939 | /* Rtx's of different codes cannot be equal. */ |
---|
940 | if (code != GET_CODE (y)) |
---|
941 | return 0; |
---|
942 | |
---|
943 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. |
---|
944 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ |
---|
945 | |
---|
946 | if (GET_MODE (x) != GET_MODE (y)) |
---|
947 | return 0; |
---|
948 | |
---|
949 | /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ |
---|
950 | |
---|
951 | if (code == REG) |
---|
952 | /* Until rtl generation is complete, don't consider a reference to the |
---|
953 | return register of the current function the same as the return from a |
---|
954 | called function. This eases the job of function integration. Once the |
---|
955 | distinction is no longer needed, they can be considered equivalent. */ |
---|
956 | return (REGNO (x) == REGNO (y) |
---|
957 | && (! rtx_equal_function_value_matters |
---|
958 | || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y))); |
---|
959 | else if (code == LABEL_REF) |
---|
960 | return XEXP (x, 0) == XEXP (y, 0); |
---|
961 | else if (code == SYMBOL_REF) |
---|
962 | return XSTR (x, 0) == XSTR (y, 0); |
---|
963 | else if (code == SCRATCH || code == CONST_DOUBLE) |
---|
964 | return 0; |
---|
965 | |
---|
966 | /* Compare the elements. If any pair of corresponding elements |
---|
967 | fail to match, return 0 for the whole things. */ |
---|
968 | |
---|
969 | fmt = GET_RTX_FORMAT (code); |
---|
970 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
971 | { |
---|
972 | switch (fmt[i]) |
---|
973 | { |
---|
974 | case 'w': |
---|
975 | if (XWINT (x, i) != XWINT (y, i)) |
---|
976 | return 0; |
---|
977 | break; |
---|
978 | |
---|
979 | case 'n': |
---|
980 | case 'i': |
---|
981 | if (XINT (x, i) != XINT (y, i)) |
---|
982 | return 0; |
---|
983 | break; |
---|
984 | |
---|
985 | case 'V': |
---|
986 | case 'E': |
---|
987 | /* Two vectors must have the same length. */ |
---|
988 | if (XVECLEN (x, i) != XVECLEN (y, i)) |
---|
989 | return 0; |
---|
990 | |
---|
991 | /* And the corresponding elements must match. */ |
---|
992 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
993 | if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) |
---|
994 | return 0; |
---|
995 | break; |
---|
996 | |
---|
997 | case 'e': |
---|
998 | if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0) |
---|
999 | return 0; |
---|
1000 | break; |
---|
1001 | |
---|
1002 | case 'S': |
---|
1003 | case 's': |
---|
1004 | if (strcmp (XSTR (x, i), XSTR (y, i))) |
---|
1005 | return 0; |
---|
1006 | break; |
---|
1007 | |
---|
1008 | case 'u': |
---|
1009 | /* These are just backpointers, so they don't matter. */ |
---|
1010 | break; |
---|
1011 | |
---|
1012 | case '0': |
---|
1013 | break; |
---|
1014 | |
---|
1015 | /* It is believed that rtx's at this level will never |
---|
1016 | contain anything but integers and other rtx's, |
---|
1017 | except for within LABEL_REFs and SYMBOL_REFs. */ |
---|
1018 | default: |
---|
1019 | abort (); |
---|
1020 | } |
---|
1021 | } |
---|
1022 | return 1; |
---|
1023 | } |
---|
1024 | |
---|
1025 | /* Call FUN on each register or MEM that is stored into or clobbered by X. |
---|
1026 | (X would be the pattern of an insn). |
---|
1027 | FUN receives two arguments: |
---|
1028 | the REG, MEM, CC0 or PC being stored in or clobbered, |
---|
1029 | the SET or CLOBBER rtx that does the store. |
---|
1030 | |
---|
1031 | If the item being stored in or clobbered is a SUBREG of a hard register, |
---|
1032 | the SUBREG will be passed. */ |
---|
1033 | |
---|
1034 | void |
---|
1035 | note_stores (x, fun) |
---|
1036 | register rtx x; |
---|
1037 | void (*fun) (); |
---|
1038 | { |
---|
1039 | if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)) |
---|
1040 | { |
---|
1041 | register rtx dest = SET_DEST (x); |
---|
1042 | while ((GET_CODE (dest) == SUBREG |
---|
1043 | && (GET_CODE (SUBREG_REG (dest)) != REG |
---|
1044 | || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) |
---|
1045 | || GET_CODE (dest) == ZERO_EXTRACT |
---|
1046 | || GET_CODE (dest) == SIGN_EXTRACT |
---|
1047 | || GET_CODE (dest) == STRICT_LOW_PART) |
---|
1048 | dest = XEXP (dest, 0); |
---|
1049 | (*fun) (dest, x); |
---|
1050 | } |
---|
1051 | else if (GET_CODE (x) == PARALLEL) |
---|
1052 | { |
---|
1053 | register int i; |
---|
1054 | for (i = XVECLEN (x, 0) - 1; i >= 0; i--) |
---|
1055 | { |
---|
1056 | register rtx y = XVECEXP (x, 0, i); |
---|
1057 | if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER) |
---|
1058 | { |
---|
1059 | register rtx dest = SET_DEST (y); |
---|
1060 | while ((GET_CODE (dest) == SUBREG |
---|
1061 | && (GET_CODE (SUBREG_REG (dest)) != REG |
---|
1062 | || (REGNO (SUBREG_REG (dest)) |
---|
1063 | >= FIRST_PSEUDO_REGISTER))) |
---|
1064 | || GET_CODE (dest) == ZERO_EXTRACT |
---|
1065 | || GET_CODE (dest) == SIGN_EXTRACT |
---|
1066 | || GET_CODE (dest) == STRICT_LOW_PART) |
---|
1067 | dest = XEXP (dest, 0); |
---|
1068 | (*fun) (dest, y); |
---|
1069 | } |
---|
1070 | } |
---|
1071 | } |
---|
1072 | } |
---|
1073 | |
---|
1074 | /* Return nonzero if X's old contents don't survive after INSN. |
---|
1075 | This will be true if X is (cc0) or if X is a register and |
---|
1076 | X dies in INSN or because INSN entirely sets X. |
---|
1077 | |
---|
1078 | "Entirely set" means set directly and not through a SUBREG, |
---|
1079 | ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. |
---|
1080 | Likewise, REG_INC does not count. |
---|
1081 | |
---|
1082 | REG may be a hard or pseudo reg. Renumbering is not taken into account, |
---|
1083 | but for this use that makes no difference, since regs don't overlap |
---|
1084 | during their lifetimes. Therefore, this function may be used |
---|
1085 | at any time after deaths have been computed (in flow.c). |
---|
1086 | |
---|
1087 | If REG is a hard reg that occupies multiple machine registers, this |
---|
1088 | function will only return 1 if each of those registers will be replaced |
---|
1089 | by INSN. */ |
---|
1090 | |
---|
1091 | int |
---|
1092 | dead_or_set_p (insn, x) |
---|
1093 | rtx insn; |
---|
1094 | rtx x; |
---|
1095 | { |
---|
1096 | register int regno, last_regno; |
---|
1097 | register int i; |
---|
1098 | |
---|
1099 | /* Can't use cc0_rtx below since this file is used by genattrtab.c. */ |
---|
1100 | if (GET_CODE (x) == CC0) |
---|
1101 | return 1; |
---|
1102 | |
---|
1103 | if (GET_CODE (x) != REG) |
---|
1104 | abort (); |
---|
1105 | |
---|
1106 | regno = REGNO (x); |
---|
1107 | last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno |
---|
1108 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1); |
---|
1109 | |
---|
1110 | for (i = regno; i <= last_regno; i++) |
---|
1111 | if (! dead_or_set_regno_p (insn, i)) |
---|
1112 | return 0; |
---|
1113 | |
---|
1114 | return 1; |
---|
1115 | } |
---|
1116 | |
---|
1117 | /* Utility function for dead_or_set_p to check an individual register. Also |
---|
1118 | called from flow.c. */ |
---|
1119 | |
---|
1120 | int |
---|
1121 | dead_or_set_regno_p (insn, test_regno) |
---|
1122 | rtx insn; |
---|
1123 | int test_regno; |
---|
1124 | { |
---|
1125 | int regno, endregno; |
---|
1126 | rtx link; |
---|
1127 | |
---|
1128 | /* See if there is a death note for something that includes TEST_REGNO. */ |
---|
1129 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
1130 | { |
---|
1131 | if (REG_NOTE_KIND (link) != REG_DEAD || GET_CODE (XEXP (link, 0)) != REG) |
---|
1132 | continue; |
---|
1133 | |
---|
1134 | regno = REGNO (XEXP (link, 0)); |
---|
1135 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 |
---|
1136 | : regno + HARD_REGNO_NREGS (regno, |
---|
1137 | GET_MODE (XEXP (link, 0)))); |
---|
1138 | |
---|
1139 | if (test_regno >= regno && test_regno < endregno) |
---|
1140 | return 1; |
---|
1141 | } |
---|
1142 | |
---|
1143 | if (GET_CODE (insn) == CALL_INSN |
---|
1144 | && find_regno_fusage (insn, CLOBBER, test_regno)) |
---|
1145 | return 1; |
---|
1146 | |
---|
1147 | if (GET_CODE (PATTERN (insn)) == SET) |
---|
1148 | { |
---|
1149 | rtx dest = SET_DEST (PATTERN (insn)); |
---|
1150 | |
---|
1151 | /* A value is totally replaced if it is the destination or the |
---|
1152 | destination is a SUBREG of REGNO that does not change the number of |
---|
1153 | words in it. */ |
---|
1154 | if (GET_CODE (dest) == SUBREG |
---|
1155 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
---|
1156 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
---|
1157 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) |
---|
1158 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) |
---|
1159 | dest = SUBREG_REG (dest); |
---|
1160 | |
---|
1161 | if (GET_CODE (dest) != REG) |
---|
1162 | return 0; |
---|
1163 | |
---|
1164 | regno = REGNO (dest); |
---|
1165 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 |
---|
1166 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); |
---|
1167 | |
---|
1168 | return (test_regno >= regno && test_regno < endregno); |
---|
1169 | } |
---|
1170 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) |
---|
1171 | { |
---|
1172 | register int i; |
---|
1173 | |
---|
1174 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) |
---|
1175 | { |
---|
1176 | rtx body = XVECEXP (PATTERN (insn), 0, i); |
---|
1177 | |
---|
1178 | if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) |
---|
1179 | { |
---|
1180 | rtx dest = SET_DEST (body); |
---|
1181 | |
---|
1182 | if (GET_CODE (dest) == SUBREG |
---|
1183 | && (((GET_MODE_SIZE (GET_MODE (dest)) |
---|
1184 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
---|
1185 | == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) |
---|
1186 | + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) |
---|
1187 | dest = SUBREG_REG (dest); |
---|
1188 | |
---|
1189 | if (GET_CODE (dest) != REG) |
---|
1190 | continue; |
---|
1191 | |
---|
1192 | regno = REGNO (dest); |
---|
1193 | endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 |
---|
1194 | : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest))); |
---|
1195 | |
---|
1196 | if (test_regno >= regno && test_regno < endregno) |
---|
1197 | return 1; |
---|
1198 | } |
---|
1199 | } |
---|
1200 | } |
---|
1201 | |
---|
1202 | return 0; |
---|
1203 | } |
---|
1204 | |
---|
1205 | /* Return the reg-note of kind KIND in insn INSN, if there is one. |
---|
1206 | If DATUM is nonzero, look for one whose datum is DATUM. */ |
---|
1207 | |
---|
1208 | rtx |
---|
1209 | find_reg_note (insn, kind, datum) |
---|
1210 | rtx insn; |
---|
1211 | enum reg_note kind; |
---|
1212 | rtx datum; |
---|
1213 | { |
---|
1214 | register rtx link; |
---|
1215 | |
---|
1216 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
1217 | if (REG_NOTE_KIND (link) == kind |
---|
1218 | && (datum == 0 || datum == XEXP (link, 0))) |
---|
1219 | return link; |
---|
1220 | return 0; |
---|
1221 | } |
---|
1222 | |
---|
1223 | /* Return the reg-note of kind KIND in insn INSN which applies to register |
---|
1224 | number REGNO, if any. Return 0 if there is no such reg-note. Note that |
---|
1225 | the REGNO of this NOTE need not be REGNO if REGNO is a hard register; |
---|
1226 | it might be the case that the note overlaps REGNO. */ |
---|
1227 | |
---|
1228 | rtx |
---|
1229 | find_regno_note (insn, kind, regno) |
---|
1230 | rtx insn; |
---|
1231 | enum reg_note kind; |
---|
1232 | int regno; |
---|
1233 | { |
---|
1234 | register rtx link; |
---|
1235 | |
---|
1236 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
1237 | if (REG_NOTE_KIND (link) == kind |
---|
1238 | /* Verify that it is a register, so that scratch and MEM won't cause a |
---|
1239 | problem here. */ |
---|
1240 | && GET_CODE (XEXP (link, 0)) == REG |
---|
1241 | && REGNO (XEXP (link, 0)) <= regno |
---|
1242 | && ((REGNO (XEXP (link, 0)) |
---|
1243 | + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1 |
---|
1244 | : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)), |
---|
1245 | GET_MODE (XEXP (link, 0))))) |
---|
1246 | > regno)) |
---|
1247 | return link; |
---|
1248 | return 0; |
---|
1249 | } |
---|
1250 | |
---|
1251 | /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found |
---|
1252 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ |
---|
1253 | |
---|
1254 | int |
---|
1255 | find_reg_fusage (insn, code, datum) |
---|
1256 | rtx insn; |
---|
1257 | enum rtx_code code; |
---|
1258 | rtx datum; |
---|
1259 | { |
---|
1260 | /* If it's not a CALL_INSN, it can't possibly have a |
---|
1261 | CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */ |
---|
1262 | if (GET_CODE (insn) != CALL_INSN) |
---|
1263 | return 0; |
---|
1264 | |
---|
1265 | if (! datum) |
---|
1266 | abort(); |
---|
1267 | |
---|
1268 | if (GET_CODE (datum) != REG) |
---|
1269 | { |
---|
1270 | register rtx link; |
---|
1271 | |
---|
1272 | for (link = CALL_INSN_FUNCTION_USAGE (insn); |
---|
1273 | link; |
---|
1274 | link = XEXP (link, 1)) |
---|
1275 | if (GET_CODE (XEXP (link, 0)) == code |
---|
1276 | && rtx_equal_p (datum, SET_DEST (XEXP (link, 0)))) |
---|
1277 | return 1; |
---|
1278 | } |
---|
1279 | else |
---|
1280 | { |
---|
1281 | register int regno = REGNO (datum); |
---|
1282 | |
---|
1283 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references |
---|
1284 | to pseudo registers, so don't bother checking. */ |
---|
1285 | |
---|
1286 | if (regno < FIRST_PSEUDO_REGISTER) |
---|
1287 | { |
---|
1288 | int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum)); |
---|
1289 | int i; |
---|
1290 | |
---|
1291 | for (i = regno; i < end_regno; i++) |
---|
1292 | if (find_regno_fusage (insn, code, i)) |
---|
1293 | return 1; |
---|
1294 | } |
---|
1295 | } |
---|
1296 | |
---|
1297 | return 0; |
---|
1298 | } |
---|
1299 | |
---|
1300 | /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found |
---|
1301 | in the CALL_INSN_FUNCTION_USAGE information of INSN. */ |
---|
1302 | |
---|
1303 | int |
---|
1304 | find_regno_fusage (insn, code, regno) |
---|
1305 | rtx insn; |
---|
1306 | enum rtx_code code; |
---|
1307 | int regno; |
---|
1308 | { |
---|
1309 | register rtx link; |
---|
1310 | |
---|
1311 | /* CALL_INSN_FUNCTION_USAGE information cannot contain references |
---|
1312 | to pseudo registers, so don't bother checking. */ |
---|
1313 | |
---|
1314 | if (regno >= FIRST_PSEUDO_REGISTER |
---|
1315 | || GET_CODE (insn) != CALL_INSN ) |
---|
1316 | return 0; |
---|
1317 | |
---|
1318 | for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1)) |
---|
1319 | { |
---|
1320 | register int regnote; |
---|
1321 | register rtx op; |
---|
1322 | |
---|
1323 | if (GET_CODE (op = XEXP (link, 0)) == code |
---|
1324 | && GET_CODE (SET_DEST (op)) == REG |
---|
1325 | && (regnote = REGNO (SET_DEST (op))) <= regno |
---|
1326 | && regnote |
---|
1327 | + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op))) |
---|
1328 | > regno) |
---|
1329 | return 1; |
---|
1330 | } |
---|
1331 | |
---|
1332 | return 0; |
---|
1333 | } |
---|
1334 | |
---|
1335 | /* Remove register note NOTE from the REG_NOTES of INSN. */ |
---|
1336 | |
---|
1337 | void |
---|
1338 | remove_note (insn, note) |
---|
1339 | register rtx note; |
---|
1340 | register rtx insn; |
---|
1341 | { |
---|
1342 | register rtx link; |
---|
1343 | |
---|
1344 | if (REG_NOTES (insn) == note) |
---|
1345 | { |
---|
1346 | REG_NOTES (insn) = XEXP (note, 1); |
---|
1347 | return; |
---|
1348 | } |
---|
1349 | |
---|
1350 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
---|
1351 | if (XEXP (link, 1) == note) |
---|
1352 | { |
---|
1353 | XEXP (link, 1) = XEXP (note, 1); |
---|
1354 | return; |
---|
1355 | } |
---|
1356 | |
---|
1357 | abort (); |
---|
1358 | } |
---|
1359 | |
---|
1360 | /* Nonzero if X contains any volatile instructions. These are instructions |
---|
1361 | which may cause unpredictable machine state instructions, and thus no |
---|
1362 | instructions should be moved or combined across them. This includes |
---|
1363 | only volatile asms and UNSPEC_VOLATILE instructions. */ |
---|
1364 | |
---|
1365 | int |
---|
1366 | volatile_insn_p (x) |
---|
1367 | rtx x; |
---|
1368 | { |
---|
1369 | register RTX_CODE code; |
---|
1370 | |
---|
1371 | code = GET_CODE (x); |
---|
1372 | switch (code) |
---|
1373 | { |
---|
1374 | case LABEL_REF: |
---|
1375 | case SYMBOL_REF: |
---|
1376 | case CONST_INT: |
---|
1377 | case CONST: |
---|
1378 | case CONST_DOUBLE: |
---|
1379 | case CC0: |
---|
1380 | case PC: |
---|
1381 | case REG: |
---|
1382 | case SCRATCH: |
---|
1383 | case CLOBBER: |
---|
1384 | case ASM_INPUT: |
---|
1385 | case ADDR_VEC: |
---|
1386 | case ADDR_DIFF_VEC: |
---|
1387 | case CALL: |
---|
1388 | case MEM: |
---|
1389 | return 0; |
---|
1390 | |
---|
1391 | case UNSPEC_VOLATILE: |
---|
1392 | /* case TRAP_IF: This isn't clear yet. */ |
---|
1393 | return 1; |
---|
1394 | |
---|
1395 | case ASM_OPERANDS: |
---|
1396 | if (MEM_VOLATILE_P (x)) |
---|
1397 | return 1; |
---|
1398 | } |
---|
1399 | |
---|
1400 | /* Recursively scan the operands of this expression. */ |
---|
1401 | |
---|
1402 | { |
---|
1403 | register char *fmt = GET_RTX_FORMAT (code); |
---|
1404 | register int i; |
---|
1405 | |
---|
1406 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1407 | { |
---|
1408 | if (fmt[i] == 'e') |
---|
1409 | { |
---|
1410 | if (volatile_insn_p (XEXP (x, i))) |
---|
1411 | return 1; |
---|
1412 | } |
---|
1413 | if (fmt[i] == 'E') |
---|
1414 | { |
---|
1415 | register int j; |
---|
1416 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1417 | if (volatile_insn_p (XVECEXP (x, i, j))) |
---|
1418 | return 1; |
---|
1419 | } |
---|
1420 | } |
---|
1421 | } |
---|
1422 | return 0; |
---|
1423 | } |
---|
1424 | |
---|
1425 | /* Nonzero if X contains any volatile memory references |
---|
1426 | UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */ |
---|
1427 | |
---|
1428 | int |
---|
1429 | volatile_refs_p (x) |
---|
1430 | rtx x; |
---|
1431 | { |
---|
1432 | register RTX_CODE code; |
---|
1433 | |
---|
1434 | code = GET_CODE (x); |
---|
1435 | switch (code) |
---|
1436 | { |
---|
1437 | case LABEL_REF: |
---|
1438 | case SYMBOL_REF: |
---|
1439 | case CONST_INT: |
---|
1440 | case CONST: |
---|
1441 | case CONST_DOUBLE: |
---|
1442 | case CC0: |
---|
1443 | case PC: |
---|
1444 | case REG: |
---|
1445 | case SCRATCH: |
---|
1446 | case CLOBBER: |
---|
1447 | case ASM_INPUT: |
---|
1448 | case ADDR_VEC: |
---|
1449 | case ADDR_DIFF_VEC: |
---|
1450 | return 0; |
---|
1451 | |
---|
1452 | case CALL: |
---|
1453 | case UNSPEC_VOLATILE: |
---|
1454 | /* case TRAP_IF: This isn't clear yet. */ |
---|
1455 | return 1; |
---|
1456 | |
---|
1457 | case MEM: |
---|
1458 | case ASM_OPERANDS: |
---|
1459 | if (MEM_VOLATILE_P (x)) |
---|
1460 | return 1; |
---|
1461 | } |
---|
1462 | |
---|
1463 | /* Recursively scan the operands of this expression. */ |
---|
1464 | |
---|
1465 | { |
---|
1466 | register char *fmt = GET_RTX_FORMAT (code); |
---|
1467 | register int i; |
---|
1468 | |
---|
1469 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1470 | { |
---|
1471 | if (fmt[i] == 'e') |
---|
1472 | { |
---|
1473 | if (volatile_refs_p (XEXP (x, i))) |
---|
1474 | return 1; |
---|
1475 | } |
---|
1476 | if (fmt[i] == 'E') |
---|
1477 | { |
---|
1478 | register int j; |
---|
1479 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1480 | if (volatile_refs_p (XVECEXP (x, i, j))) |
---|
1481 | return 1; |
---|
1482 | } |
---|
1483 | } |
---|
1484 | } |
---|
1485 | return 0; |
---|
1486 | } |
---|
1487 | |
---|
1488 | /* Similar to above, except that it also rejects register pre- and post- |
---|
1489 | incrementing. */ |
---|
1490 | |
---|
1491 | int |
---|
1492 | side_effects_p (x) |
---|
1493 | rtx x; |
---|
1494 | { |
---|
1495 | register RTX_CODE code; |
---|
1496 | |
---|
1497 | code = GET_CODE (x); |
---|
1498 | switch (code) |
---|
1499 | { |
---|
1500 | case LABEL_REF: |
---|
1501 | case SYMBOL_REF: |
---|
1502 | case CONST_INT: |
---|
1503 | case CONST: |
---|
1504 | case CONST_DOUBLE: |
---|
1505 | case CC0: |
---|
1506 | case PC: |
---|
1507 | case REG: |
---|
1508 | case SCRATCH: |
---|
1509 | case ASM_INPUT: |
---|
1510 | case ADDR_VEC: |
---|
1511 | case ADDR_DIFF_VEC: |
---|
1512 | return 0; |
---|
1513 | |
---|
1514 | case CLOBBER: |
---|
1515 | /* Reject CLOBBER with a non-VOID mode. These are made by combine.c |
---|
1516 | when some combination can't be done. If we see one, don't think |
---|
1517 | that we can simplify the expression. */ |
---|
1518 | return (GET_MODE (x) != VOIDmode); |
---|
1519 | |
---|
1520 | case PRE_INC: |
---|
1521 | case PRE_DEC: |
---|
1522 | case POST_INC: |
---|
1523 | case POST_DEC: |
---|
1524 | case CALL: |
---|
1525 | case UNSPEC_VOLATILE: |
---|
1526 | /* case TRAP_IF: This isn't clear yet. */ |
---|
1527 | return 1; |
---|
1528 | |
---|
1529 | case MEM: |
---|
1530 | case ASM_OPERANDS: |
---|
1531 | if (MEM_VOLATILE_P (x)) |
---|
1532 | return 1; |
---|
1533 | } |
---|
1534 | |
---|
1535 | /* Recursively scan the operands of this expression. */ |
---|
1536 | |
---|
1537 | { |
---|
1538 | register char *fmt = GET_RTX_FORMAT (code); |
---|
1539 | register int i; |
---|
1540 | |
---|
1541 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1542 | { |
---|
1543 | if (fmt[i] == 'e') |
---|
1544 | { |
---|
1545 | if (side_effects_p (XEXP (x, i))) |
---|
1546 | return 1; |
---|
1547 | } |
---|
1548 | if (fmt[i] == 'E') |
---|
1549 | { |
---|
1550 | register int j; |
---|
1551 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1552 | if (side_effects_p (XVECEXP (x, i, j))) |
---|
1553 | return 1; |
---|
1554 | } |
---|
1555 | } |
---|
1556 | } |
---|
1557 | return 0; |
---|
1558 | } |
---|
1559 | |
---|
1560 | /* Return nonzero if evaluating rtx X might cause a trap. */ |
---|
1561 | |
---|
1562 | int |
---|
1563 | may_trap_p (x) |
---|
1564 | rtx x; |
---|
1565 | { |
---|
1566 | int i; |
---|
1567 | enum rtx_code code; |
---|
1568 | char *fmt; |
---|
1569 | |
---|
1570 | if (x == 0) |
---|
1571 | return 0; |
---|
1572 | code = GET_CODE (x); |
---|
1573 | switch (code) |
---|
1574 | { |
---|
1575 | /* Handle these cases quickly. */ |
---|
1576 | case CONST_INT: |
---|
1577 | case CONST_DOUBLE: |
---|
1578 | case SYMBOL_REF: |
---|
1579 | case LABEL_REF: |
---|
1580 | case CONST: |
---|
1581 | case PC: |
---|
1582 | case CC0: |
---|
1583 | case REG: |
---|
1584 | case SCRATCH: |
---|
1585 | return 0; |
---|
1586 | |
---|
1587 | /* Conditional trap can trap! */ |
---|
1588 | case UNSPEC_VOLATILE: |
---|
1589 | case TRAP_IF: |
---|
1590 | return 1; |
---|
1591 | |
---|
1592 | /* Memory ref can trap unless it's a static var or a stack slot. */ |
---|
1593 | case MEM: |
---|
1594 | return rtx_addr_can_trap_p (XEXP (x, 0)); |
---|
1595 | |
---|
1596 | /* Division by a non-constant might trap. */ |
---|
1597 | case DIV: |
---|
1598 | case MOD: |
---|
1599 | case UDIV: |
---|
1600 | case UMOD: |
---|
1601 | if (! CONSTANT_P (XEXP (x, 1))) |
---|
1602 | return 1; |
---|
1603 | /* This was const0_rtx, but by not using that, |
---|
1604 | we can link this file into other programs. */ |
---|
1605 | if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0) |
---|
1606 | return 1; |
---|
1607 | case EXPR_LIST: |
---|
1608 | /* An EXPR_LIST is used to represent a function call. This |
---|
1609 | certainly may trap. */ |
---|
1610 | return 1; |
---|
1611 | default: |
---|
1612 | /* Any floating arithmetic may trap. */ |
---|
1613 | if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) |
---|
1614 | return 1; |
---|
1615 | } |
---|
1616 | |
---|
1617 | fmt = GET_RTX_FORMAT (code); |
---|
1618 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1619 | { |
---|
1620 | if (fmt[i] == 'e') |
---|
1621 | { |
---|
1622 | if (may_trap_p (XEXP (x, i))) |
---|
1623 | return 1; |
---|
1624 | } |
---|
1625 | else if (fmt[i] == 'E') |
---|
1626 | { |
---|
1627 | register int j; |
---|
1628 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1629 | if (may_trap_p (XVECEXP (x, i, j))) |
---|
1630 | return 1; |
---|
1631 | } |
---|
1632 | } |
---|
1633 | return 0; |
---|
1634 | } |
---|
1635 | |
---|
1636 | /* Return nonzero if X contains a comparison that is not either EQ or NE, |
---|
1637 | i.e., an inequality. */ |
---|
1638 | |
---|
1639 | int |
---|
1640 | inequality_comparisons_p (x) |
---|
1641 | rtx x; |
---|
1642 | { |
---|
1643 | register char *fmt; |
---|
1644 | register int len, i; |
---|
1645 | register enum rtx_code code = GET_CODE (x); |
---|
1646 | |
---|
1647 | switch (code) |
---|
1648 | { |
---|
1649 | case REG: |
---|
1650 | case SCRATCH: |
---|
1651 | case PC: |
---|
1652 | case CC0: |
---|
1653 | case CONST_INT: |
---|
1654 | case CONST_DOUBLE: |
---|
1655 | case CONST: |
---|
1656 | case LABEL_REF: |
---|
1657 | case SYMBOL_REF: |
---|
1658 | return 0; |
---|
1659 | |
---|
1660 | case LT: |
---|
1661 | case LTU: |
---|
1662 | case GT: |
---|
1663 | case GTU: |
---|
1664 | case LE: |
---|
1665 | case LEU: |
---|
1666 | case GE: |
---|
1667 | case GEU: |
---|
1668 | return 1; |
---|
1669 | } |
---|
1670 | |
---|
1671 | len = GET_RTX_LENGTH (code); |
---|
1672 | fmt = GET_RTX_FORMAT (code); |
---|
1673 | |
---|
1674 | for (i = 0; i < len; i++) |
---|
1675 | { |
---|
1676 | if (fmt[i] == 'e') |
---|
1677 | { |
---|
1678 | if (inequality_comparisons_p (XEXP (x, i))) |
---|
1679 | return 1; |
---|
1680 | } |
---|
1681 | else if (fmt[i] == 'E') |
---|
1682 | { |
---|
1683 | register int j; |
---|
1684 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
1685 | if (inequality_comparisons_p (XVECEXP (x, i, j))) |
---|
1686 | return 1; |
---|
1687 | } |
---|
1688 | } |
---|
1689 | |
---|
1690 | return 0; |
---|
1691 | } |
---|
1692 | |
---|
1693 | /* Replace any occurrence of FROM in X with TO. |
---|
1694 | |
---|
1695 | Note that copying is not done so X must not be shared unless all copies |
---|
1696 | are to be modified. */ |
---|
1697 | |
---|
1698 | rtx |
---|
1699 | replace_rtx (x, from, to) |
---|
1700 | rtx x, from, to; |
---|
1701 | { |
---|
1702 | register int i, j; |
---|
1703 | register char *fmt; |
---|
1704 | |
---|
1705 | if (x == from) |
---|
1706 | return to; |
---|
1707 | |
---|
1708 | /* Allow this function to make replacements in EXPR_LISTs. */ |
---|
1709 | if (x == 0) |
---|
1710 | return 0; |
---|
1711 | |
---|
1712 | fmt = GET_RTX_FORMAT (GET_CODE (x)); |
---|
1713 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
---|
1714 | { |
---|
1715 | if (fmt[i] == 'e') |
---|
1716 | XEXP (x, i) = replace_rtx (XEXP (x, i), from, to); |
---|
1717 | else if (fmt[i] == 'E') |
---|
1718 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
1719 | XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to); |
---|
1720 | } |
---|
1721 | |
---|
1722 | return x; |
---|
1723 | } |
---|
1724 | |
---|
1725 | /* Throughout the rtx X, replace many registers according to REG_MAP. |
---|
1726 | Return the replacement for X (which may be X with altered contents). |
---|
1727 | REG_MAP[R] is the replacement for register R, or 0 for don't replace. |
---|
1728 | NREGS is the length of REG_MAP; regs >= NREGS are not mapped. |
---|
1729 | |
---|
1730 | We only support REG_MAP entries of REG or SUBREG. Also, hard registers |
---|
1731 | should not be mapped to pseudos or vice versa since validate_change |
---|
1732 | is not called. |
---|
1733 | |
---|
1734 | If REPLACE_DEST is 1, replacements are also done in destinations; |
---|
1735 | otherwise, only sources are replaced. */ |
---|
1736 | |
---|
1737 | rtx |
---|
1738 | replace_regs (x, reg_map, nregs, replace_dest) |
---|
1739 | rtx x; |
---|
1740 | rtx *reg_map; |
---|
1741 | int nregs; |
---|
1742 | int replace_dest; |
---|
1743 | { |
---|
1744 | register enum rtx_code code; |
---|
1745 | register int i; |
---|
1746 | register char *fmt; |
---|
1747 | |
---|
1748 | if (x == 0) |
---|
1749 | return x; |
---|
1750 | |
---|
1751 | code = GET_CODE (x); |
---|
1752 | switch (code) |
---|
1753 | { |
---|
1754 | case SCRATCH: |
---|
1755 | case PC: |
---|
1756 | case CC0: |
---|
1757 | case CONST_INT: |
---|
1758 | case CONST_DOUBLE: |
---|
1759 | case CONST: |
---|
1760 | case SYMBOL_REF: |
---|
1761 | case LABEL_REF: |
---|
1762 | return x; |
---|
1763 | |
---|
1764 | case REG: |
---|
1765 | /* Verify that the register has an entry before trying to access it. */ |
---|
1766 | if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0) |
---|
1767 | { |
---|
1768 | /* SUBREGs can't be shared. Always return a copy to ensure that if |
---|
1769 | this replacement occurs more than once then each instance will |
---|
1770 | get distinct rtx. */ |
---|
1771 | if (GET_CODE (reg_map[REGNO (x)]) == SUBREG) |
---|
1772 | return copy_rtx (reg_map[REGNO (x)]); |
---|
1773 | return reg_map[REGNO (x)]; |
---|
1774 | } |
---|
1775 | return x; |
---|
1776 | |
---|
1777 | case SUBREG: |
---|
1778 | /* Prevent making nested SUBREGs. */ |
---|
1779 | if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs |
---|
1780 | && reg_map[REGNO (SUBREG_REG (x))] != 0 |
---|
1781 | && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG) |
---|
1782 | { |
---|
1783 | rtx map_val = reg_map[REGNO (SUBREG_REG (x))]; |
---|
1784 | rtx map_inner = SUBREG_REG (map_val); |
---|
1785 | |
---|
1786 | if (GET_MODE (x) == GET_MODE (map_inner)) |
---|
1787 | return map_inner; |
---|
1788 | else |
---|
1789 | { |
---|
1790 | /* We cannot call gen_rtx here since we may be linked with |
---|
1791 | genattrtab.c. */ |
---|
1792 | /* Let's try clobbering the incoming SUBREG and see |
---|
1793 | if this is really safe. */ |
---|
1794 | SUBREG_REG (x) = map_inner; |
---|
1795 | SUBREG_WORD (x) += SUBREG_WORD (map_val); |
---|
1796 | return x; |
---|
1797 | #if 0 |
---|
1798 | rtx new = rtx_alloc (SUBREG); |
---|
1799 | PUT_MODE (new, GET_MODE (x)); |
---|
1800 | SUBREG_REG (new) = map_inner; |
---|
1801 | SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val); |
---|
1802 | #endif |
---|
1803 | } |
---|
1804 | } |
---|
1805 | break; |
---|
1806 | |
---|
1807 | case SET: |
---|
1808 | if (replace_dest) |
---|
1809 | SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0); |
---|
1810 | |
---|
1811 | else if (GET_CODE (SET_DEST (x)) == MEM |
---|
1812 | || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART) |
---|
1813 | /* Even if we are not to replace destinations, replace register if it |
---|
1814 | is CONTAINED in destination (destination is memory or |
---|
1815 | STRICT_LOW_PART). */ |
---|
1816 | XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0), |
---|
1817 | reg_map, nregs, 0); |
---|
1818 | else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) |
---|
1819 | /* Similarly, for ZERO_EXTRACT we replace all operands. */ |
---|
1820 | break; |
---|
1821 | |
---|
1822 | SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0); |
---|
1823 | return x; |
---|
1824 | } |
---|
1825 | |
---|
1826 | fmt = GET_RTX_FORMAT (code); |
---|
1827 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
1828 | { |
---|
1829 | if (fmt[i] == 'e') |
---|
1830 | XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest); |
---|
1831 | if (fmt[i] == 'E') |
---|
1832 | { |
---|
1833 | register int j; |
---|
1834 | for (j = 0; j < XVECLEN (x, i); j++) |
---|
1835 | XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map, |
---|
1836 | nregs, replace_dest); |
---|
1837 | } |
---|
1838 | } |
---|
1839 | return x; |
---|
1840 | } |
---|