1 | /* Dummy data flow analysis for GNU compiler in nonoptimizing mode. |
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2 | Copyright (C) 1987, 1991, 1994, 1995 Free Software Foundation, Inc. |
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3 | |
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4 | This file is part of GNU CC. |
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5 | |
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6 | GNU CC is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 2, or (at your option) |
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9 | any later version. |
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10 | |
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11 | GNU CC is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |
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16 | You should have received a copy of the GNU General Public License |
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17 | along with GNU CC; see the file COPYING. If not, write to |
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18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
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19 | Boston, MA 02111-1307, USA. */ |
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20 | |
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21 | |
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22 | /* This file performs stupid register allocation, which is used |
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23 | when cc1 gets the -noreg switch (which is when cc does not get -O). |
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24 | |
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25 | Stupid register allocation goes in place of the the flow_analysis, |
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26 | local_alloc and global_alloc passes. combine_instructions cannot |
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27 | be done with stupid allocation because the data flow info that it needs |
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28 | is not computed here. |
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29 | |
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30 | In stupid allocation, the only user-defined variables that can |
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31 | go in registers are those declared "register". They are assumed |
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32 | to have a life span equal to their scope. Other user variables |
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33 | are given stack slots in the rtl-generation pass and are not |
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34 | represented as pseudo regs. A compiler-generated temporary |
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35 | is assumed to live from its first mention to its last mention. |
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36 | |
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37 | Since each pseudo-reg's life span is just an interval, it can be |
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38 | represented as a pair of numbers, each of which identifies an insn by |
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39 | its position in the function (number of insns before it). The first |
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40 | thing done for stupid allocation is to compute such a number for each |
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41 | insn. It is called the suid. Then the life-interval of each |
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42 | pseudo reg is computed. Then the pseudo regs are ordered by priority |
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43 | and assigned hard regs in priority order. */ |
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44 | |
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45 | #include <stdio.h> |
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46 | #include "config.h" |
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47 | #include "rtl.h" |
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48 | #include "hard-reg-set.h" |
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49 | #include "regs.h" |
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50 | #include "flags.h" |
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51 | |
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52 | /* Vector mapping INSN_UIDs to suids. |
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53 | The suids are like uids but increase monotonically always. |
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54 | We use them to see whether a subroutine call came |
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55 | between a variable's birth and its death. */ |
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56 | |
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57 | static int *uid_suid; |
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58 | |
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59 | /* Get the suid of an insn. */ |
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60 | |
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61 | #define INSN_SUID(INSN) (uid_suid[INSN_UID (INSN)]) |
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62 | |
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63 | /* Record the suid of the last CALL_INSN |
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64 | so we can tell whether a pseudo reg crosses any calls. */ |
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65 | |
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66 | static int last_call_suid; |
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67 | |
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68 | /* Element N is suid of insn where life span of pseudo reg N ends. |
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69 | Element is 0 if register N has not been seen yet on backward scan. */ |
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70 | |
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71 | static int *reg_where_dead; |
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72 | |
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73 | /* Element N is suid of insn where life span of pseudo reg N begins. */ |
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74 | |
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75 | static int *reg_where_born; |
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76 | |
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77 | /* Numbers of pseudo-regs to be allocated, highest priority first. */ |
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78 | |
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79 | static int *reg_order; |
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80 | |
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81 | /* Indexed by reg number (hard or pseudo), nonzero if register is live |
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82 | at the current point in the instruction stream. */ |
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83 | |
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84 | static char *regs_live; |
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85 | |
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86 | /* Indexed by reg number, nonzero if reg was used in a SUBREG that changes |
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87 | its size. */ |
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88 | |
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89 | static char *regs_change_size; |
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90 | |
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91 | /* Indexed by insn's suid, the set of hard regs live after that insn. */ |
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92 | |
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93 | static HARD_REG_SET *after_insn_hard_regs; |
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94 | |
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95 | /* Record that hard reg REGNO is live after insn INSN. */ |
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96 | |
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97 | #define MARK_LIVE_AFTER(INSN,REGNO) \ |
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98 | SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (INSN)], (REGNO)) |
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99 | |
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100 | static int stupid_reg_compare PROTO((int *, int *)); |
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101 | static int stupid_find_reg PROTO((int, enum reg_class, enum machine_mode, |
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102 | int, int, int)); |
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103 | static void stupid_mark_refs PROTO((rtx, rtx)); |
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104 | |
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105 | /* Stupid life analysis is for the case where only variables declared |
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106 | `register' go in registers. For this case, we mark all |
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107 | pseudo-registers that belong to register variables as |
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108 | dying in the last instruction of the function, and all other |
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109 | pseudo registers as dying in the last place they are referenced. |
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110 | Hard registers are marked as dying in the last reference before |
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111 | the end or before each store into them. */ |
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112 | |
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113 | void |
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114 | stupid_life_analysis (f, nregs, file) |
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115 | rtx f; |
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116 | int nregs; |
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117 | FILE *file; |
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118 | { |
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119 | register int i; |
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120 | register rtx last, insn; |
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121 | int max_uid, max_suid; |
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122 | |
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123 | bzero (regs_ever_live, sizeof regs_ever_live); |
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124 | |
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125 | regs_live = (char *) alloca (nregs); |
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126 | |
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127 | /* First find the last real insn, and count the number of insns, |
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128 | and assign insns their suids. */ |
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129 | |
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130 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) |
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131 | if (INSN_UID (insn) > i) |
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132 | i = INSN_UID (insn); |
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133 | |
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134 | max_uid = i + 1; |
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135 | uid_suid = (int *) alloca ((i + 1) * sizeof (int)); |
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136 | |
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137 | /* Compute the mapping from uids to suids. |
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138 | Suids are numbers assigned to insns, like uids, |
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139 | except that suids increase monotonically through the code. */ |
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140 | |
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141 | last = 0; /* In case of empty function body */ |
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142 | for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) |
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143 | { |
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144 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
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145 | last = insn; |
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146 | |
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147 | INSN_SUID (insn) = ++i; |
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148 | } |
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149 | |
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150 | last_call_suid = i + 1; |
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151 | max_suid = i + 1; |
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152 | |
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153 | max_regno = nregs; |
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154 | |
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155 | /* Allocate tables to record info about regs. */ |
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156 | |
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157 | reg_where_dead = (int *) alloca (nregs * sizeof (int)); |
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158 | bzero ((char *) reg_where_dead, nregs * sizeof (int)); |
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159 | |
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160 | reg_where_born = (int *) alloca (nregs * sizeof (int)); |
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161 | bzero ((char *) reg_where_born, nregs * sizeof (int)); |
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162 | |
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163 | reg_order = (int *) alloca (nregs * sizeof (int)); |
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164 | bzero ((char *) reg_order, nregs * sizeof (int)); |
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165 | |
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166 | regs_change_size = (char *) alloca (nregs * sizeof (char)); |
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167 | bzero ((char *) regs_change_size, nregs * sizeof (char)); |
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168 | |
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169 | reg_renumber = (short *) oballoc (nregs * sizeof (short)); |
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170 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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171 | reg_renumber[i] = i; |
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172 | |
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173 | for (i = FIRST_VIRTUAL_REGISTER; i < max_regno; i++) |
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174 | reg_renumber[i] = -1; |
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175 | |
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176 | after_insn_hard_regs |
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177 | = (HARD_REG_SET *) alloca (max_suid * sizeof (HARD_REG_SET)); |
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178 | |
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179 | bzero ((char *) after_insn_hard_regs, max_suid * sizeof (HARD_REG_SET)); |
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180 | |
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181 | /* Allocate and zero out many data structures |
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182 | that will record the data from lifetime analysis. */ |
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183 | |
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184 | allocate_for_life_analysis (); |
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185 | |
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186 | for (i = 0; i < max_regno; i++) |
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187 | reg_n_deaths[i] = 1; |
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188 | |
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189 | bzero (regs_live, nregs); |
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190 | |
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191 | /* Find where each pseudo register is born and dies, |
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192 | by scanning all insns from the end to the start |
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193 | and noting all mentions of the registers. |
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194 | |
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195 | Also find where each hard register is live |
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196 | and record that info in after_insn_hard_regs. |
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197 | regs_live[I] is 1 if hard reg I is live |
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198 | at the current point in the scan. */ |
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199 | |
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200 | for (insn = last; insn; insn = PREV_INSN (insn)) |
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201 | { |
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202 | register HARD_REG_SET *p = after_insn_hard_regs + INSN_SUID (insn); |
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203 | |
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204 | /* Copy the info in regs_live into the element of after_insn_hard_regs |
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205 | for the current position in the rtl code. */ |
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206 | |
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207 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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208 | if (regs_live[i]) |
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209 | SET_HARD_REG_BIT (*p, i); |
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210 | |
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211 | /* Update which hard regs are currently live |
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212 | and also the birth and death suids of pseudo regs |
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213 | based on the pattern of this insn. */ |
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214 | |
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215 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
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216 | stupid_mark_refs (PATTERN (insn), insn); |
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217 | |
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218 | /* Mark all call-clobbered regs as live after each call insn |
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219 | so that a pseudo whose life span includes this insn |
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220 | will not go in one of them. |
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221 | Then mark those regs as all dead for the continuing scan |
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222 | of the insns before the call. */ |
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223 | |
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224 | if (GET_CODE (insn) == CALL_INSN) |
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225 | { |
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226 | last_call_suid = INSN_SUID (insn); |
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227 | IOR_HARD_REG_SET (after_insn_hard_regs[last_call_suid], |
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228 | call_used_reg_set); |
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229 | |
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230 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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231 | if (call_used_regs[i]) |
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232 | regs_live[i] = 0; |
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233 | |
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234 | /* It is important that this be done after processing the insn's |
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235 | pattern because we want the function result register to still |
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236 | be live if it's also used to pass arguments. */ |
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237 | stupid_mark_refs (CALL_INSN_FUNCTION_USAGE (insn), insn); |
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238 | } |
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239 | } |
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240 | |
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241 | /* Now decide the order in which to allocate the pseudo registers. */ |
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242 | |
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243 | for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++) |
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244 | reg_order[i] = i; |
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245 | |
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246 | qsort (®_order[LAST_VIRTUAL_REGISTER + 1], |
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247 | max_regno - LAST_VIRTUAL_REGISTER - 1, sizeof (int), |
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248 | stupid_reg_compare); |
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249 | |
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250 | /* Now, in that order, try to find hard registers for those pseudo regs. */ |
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251 | |
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252 | for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++) |
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253 | { |
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254 | register int r = reg_order[i]; |
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255 | |
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256 | /* Some regnos disappear from the rtl. Ignore them to avoid crash. */ |
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257 | if (regno_reg_rtx[r] == 0) |
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258 | continue; |
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259 | |
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260 | /* Now find the best hard-register class for this pseudo register */ |
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261 | if (N_REG_CLASSES > 1) |
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262 | reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r], |
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263 | reg_preferred_class (r), |
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264 | PSEUDO_REGNO_MODE (r), |
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265 | reg_where_born[r], |
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266 | reg_where_dead[r], |
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267 | regs_change_size[r]); |
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268 | |
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269 | /* If no reg available in that class, try alternate class. */ |
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270 | if (reg_renumber[r] == -1 && reg_alternate_class (r) != NO_REGS) |
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271 | reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r], |
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272 | reg_alternate_class (r), |
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273 | PSEUDO_REGNO_MODE (r), |
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274 | reg_where_born[r], |
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275 | reg_where_dead[r], |
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276 | regs_change_size[r]); |
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277 | } |
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278 | |
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279 | if (file) |
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280 | dump_flow_info (file); |
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281 | } |
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282 | |
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283 | /* Comparison function for qsort. |
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284 | Returns -1 (1) if register *R1P is higher priority than *R2P. */ |
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285 | |
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286 | static int |
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287 | stupid_reg_compare (r1p, r2p) |
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288 | int *r1p, *r2p; |
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289 | { |
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290 | register int r1 = *r1p, r2 = *r2p; |
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291 | register int len1 = reg_where_dead[r1] - reg_where_born[r1]; |
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292 | register int len2 = reg_where_dead[r2] - reg_where_born[r2]; |
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293 | int tem; |
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294 | |
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295 | tem = len2 - len1; |
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296 | if (tem != 0) |
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297 | return tem; |
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298 | |
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299 | tem = reg_n_refs[r1] - reg_n_refs[r2]; |
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300 | if (tem != 0) |
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301 | return tem; |
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302 | |
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303 | /* If regs are equally good, sort by regno, |
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304 | so that the results of qsort leave nothing to chance. */ |
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305 | return r1 - r2; |
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306 | } |
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307 | |
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308 | /* Find a block of SIZE words of hard registers in reg_class CLASS |
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309 | that can hold a value of machine-mode MODE |
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310 | (but actually we test only the first of the block for holding MODE) |
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311 | currently free from after insn whose suid is BIRTH |
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312 | through the insn whose suid is DEATH, |
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313 | and return the number of the first of them. |
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314 | Return -1 if such a block cannot be found. |
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315 | |
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316 | If CALL_PRESERVED is nonzero, insist on registers preserved |
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317 | over subroutine calls, and return -1 if cannot find such. |
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318 | |
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319 | If CHANGES_SIZE is nonzero, it means this register was used as the |
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320 | operand of a SUBREG that changes its size. */ |
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321 | |
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322 | static int |
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323 | stupid_find_reg (call_preserved, class, mode, |
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324 | born_insn, dead_insn, changes_size) |
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325 | int call_preserved; |
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326 | enum reg_class class; |
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327 | enum machine_mode mode; |
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328 | int born_insn, dead_insn; |
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329 | int changes_size; |
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330 | { |
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331 | register int i, ins; |
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332 | #ifdef HARD_REG_SET |
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333 | register /* Declare them register if they are scalars. */ |
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334 | #endif |
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335 | HARD_REG_SET used, this_reg; |
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336 | #ifdef ELIMINABLE_REGS |
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337 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; |
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338 | #endif |
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339 | |
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340 | COPY_HARD_REG_SET (used, |
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341 | call_preserved ? call_used_reg_set : fixed_reg_set); |
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342 | |
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343 | #ifdef ELIMINABLE_REGS |
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344 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) |
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345 | SET_HARD_REG_BIT (used, eliminables[i].from); |
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346 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
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347 | SET_HARD_REG_BIT (used, HARD_FRAME_POINTER_REGNUM); |
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348 | #endif |
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349 | #else |
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350 | SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM); |
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351 | #endif |
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352 | |
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353 | for (ins = born_insn; ins < dead_insn; ins++) |
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354 | IOR_HARD_REG_SET (used, after_insn_hard_regs[ins]); |
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355 | |
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356 | IOR_COMPL_HARD_REG_SET (used, reg_class_contents[(int) class]); |
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357 | |
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358 | #ifdef CLASS_CANNOT_CHANGE_SIZE |
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359 | if (changes_size) |
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360 | IOR_HARD_REG_SET (used, |
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361 | reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]); |
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362 | #endif |
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363 | |
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364 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
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365 | { |
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366 | #ifdef REG_ALLOC_ORDER |
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367 | int regno = reg_alloc_order[i]; |
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368 | #else |
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369 | int regno = i; |
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370 | #endif |
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371 | |
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372 | /* If a register has screwy overlap problems, |
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373 | don't use it at all if not optimizing. |
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374 | Actually this is only for the 387 stack register, |
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375 | and it's because subsequent code won't work. */ |
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376 | #ifdef OVERLAPPING_REGNO_P |
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377 | if (OVERLAPPING_REGNO_P (regno)) |
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378 | continue; |
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379 | #endif |
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380 | |
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381 | if (! TEST_HARD_REG_BIT (used, regno) |
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382 | && HARD_REGNO_MODE_OK (regno, mode)) |
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383 | { |
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384 | register int j; |
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385 | register int size1 = HARD_REGNO_NREGS (regno, mode); |
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386 | for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++); |
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387 | if (j == size1) |
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388 | { |
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389 | CLEAR_HARD_REG_SET (this_reg); |
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390 | while (--j >= 0) |
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391 | SET_HARD_REG_BIT (this_reg, regno + j); |
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392 | for (ins = born_insn; ins < dead_insn; ins++) |
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393 | { |
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394 | IOR_HARD_REG_SET (after_insn_hard_regs[ins], this_reg); |
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395 | } |
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396 | return regno; |
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397 | } |
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398 | #ifndef REG_ALLOC_ORDER |
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399 | i += j; /* Skip starting points we know will lose */ |
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400 | #endif |
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401 | } |
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402 | } |
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403 | |
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404 | return -1; |
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405 | } |
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406 | |
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407 | /* Walk X, noting all assignments and references to registers |
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408 | and recording what they imply about life spans. |
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409 | INSN is the current insn, supplied so we can find its suid. */ |
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410 | |
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411 | static void |
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412 | stupid_mark_refs (x, insn) |
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413 | rtx x, insn; |
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414 | { |
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415 | register RTX_CODE code; |
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416 | register char *fmt; |
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417 | register int regno, i; |
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418 | |
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419 | if (x == 0) |
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420 | return; |
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421 | |
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422 | code = GET_CODE (x); |
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423 | |
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424 | if (code == SET || code == CLOBBER) |
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425 | { |
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426 | if (SET_DEST (x) != 0 |
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427 | && (GET_CODE (SET_DEST (x)) == REG |
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428 | || (GET_CODE (SET_DEST (x)) == SUBREG |
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429 | && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG |
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430 | && (REGNO (SUBREG_REG (SET_DEST (x))) |
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431 | >= FIRST_PSEUDO_REGISTER)))) |
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432 | { |
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433 | /* Register is being assigned. */ |
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434 | /* If setting a SUBREG, we treat the entire reg as being set. */ |
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435 | if (GET_CODE (SET_DEST (x)) == SUBREG) |
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436 | regno = REGNO (SUBREG_REG (SET_DEST (x))); |
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437 | else |
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438 | regno = REGNO (SET_DEST (x)); |
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439 | |
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440 | /* For hard regs, update the where-live info. */ |
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441 | if (regno < FIRST_PSEUDO_REGISTER) |
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442 | { |
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443 | register int j |
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444 | = HARD_REGNO_NREGS (regno, GET_MODE (SET_DEST (x))); |
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445 | |
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446 | while (--j >= 0) |
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447 | { |
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448 | regs_ever_live[regno+j] = 1; |
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449 | regs_live[regno+j] = 0; |
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450 | |
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451 | /* The following line is for unused outputs; |
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452 | they do get stored even though never used again. */ |
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453 | MARK_LIVE_AFTER (insn, regno); |
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454 | |
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455 | /* When a hard reg is clobbered, mark it in use |
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456 | just before this insn, so it is live all through. */ |
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457 | if (code == CLOBBER && INSN_SUID (insn) > 0) |
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458 | SET_HARD_REG_BIT (after_insn_hard_regs[INSN_SUID (insn) - 1], |
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459 | regno); |
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460 | } |
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461 | } |
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462 | /* For pseudo regs, record where born, where dead, number of |
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463 | times used, and whether live across a call. */ |
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464 | else |
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465 | { |
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466 | /* Update the life-interval bounds of this pseudo reg. */ |
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467 | |
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468 | /* When a pseudo-reg is CLOBBERed, it is born just before |
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469 | the clobbering insn. When setting, just after. */ |
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470 | int where_born = INSN_SUID (insn) - (code == CLOBBER); |
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471 | |
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472 | reg_where_born[regno] = where_born; |
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473 | |
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474 | /* The reg must live at least one insn even |
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475 | in it is never again used--because it has to go |
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476 | in SOME hard reg. Mark it as dying after the current |
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477 | insn so that it will conflict with any other outputs of |
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478 | this insn. */ |
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479 | if (reg_where_dead[regno] < where_born + 2) |
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480 | { |
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481 | reg_where_dead[regno] = where_born + 2; |
---|
482 | regs_live[regno] = 1; |
---|
483 | } |
---|
484 | |
---|
485 | /* Count the refs of this reg. */ |
---|
486 | reg_n_refs[regno]++; |
---|
487 | |
---|
488 | if (last_call_suid < reg_where_dead[regno]) |
---|
489 | reg_n_calls_crossed[regno] += 1; |
---|
490 | } |
---|
491 | } |
---|
492 | |
---|
493 | /* Record references from the value being set, |
---|
494 | or from addresses in the place being set if that's not a reg. |
---|
495 | If setting a SUBREG, we treat the entire reg as *used*. */ |
---|
496 | if (code == SET) |
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497 | { |
---|
498 | stupid_mark_refs (SET_SRC (x), insn); |
---|
499 | if (GET_CODE (SET_DEST (x)) != REG) |
---|
500 | stupid_mark_refs (SET_DEST (x), insn); |
---|
501 | } |
---|
502 | return; |
---|
503 | } |
---|
504 | |
---|
505 | else if (code == SUBREG |
---|
506 | && GET_CODE (SUBREG_REG (x)) == REG |
---|
507 | && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER |
---|
508 | && (GET_MODE_SIZE (GET_MODE (x)) |
---|
509 | != GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) |
---|
510 | && (INTEGRAL_MODE_P (GET_MODE (x)) |
---|
511 | || INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (x))))) |
---|
512 | regs_change_size[REGNO (SUBREG_REG (x))] = 1; |
---|
513 | |
---|
514 | /* Register value being used, not set. */ |
---|
515 | |
---|
516 | else if (code == REG) |
---|
517 | { |
---|
518 | regno = REGNO (x); |
---|
519 | if (regno < FIRST_PSEUDO_REGISTER) |
---|
520 | { |
---|
521 | /* Hard reg: mark it live for continuing scan of previous insns. */ |
---|
522 | register int j = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
---|
523 | while (--j >= 0) |
---|
524 | { |
---|
525 | regs_ever_live[regno+j] = 1; |
---|
526 | regs_live[regno+j] = 1; |
---|
527 | } |
---|
528 | } |
---|
529 | else |
---|
530 | { |
---|
531 | /* Pseudo reg: record first use, last use and number of uses. */ |
---|
532 | |
---|
533 | reg_where_born[regno] = INSN_SUID (insn); |
---|
534 | reg_n_refs[regno]++; |
---|
535 | if (regs_live[regno] == 0) |
---|
536 | { |
---|
537 | regs_live[regno] = 1; |
---|
538 | reg_where_dead[regno] = INSN_SUID (insn); |
---|
539 | } |
---|
540 | } |
---|
541 | return; |
---|
542 | } |
---|
543 | |
---|
544 | /* Recursive scan of all other rtx's. */ |
---|
545 | |
---|
546 | fmt = GET_RTX_FORMAT (code); |
---|
547 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) |
---|
548 | { |
---|
549 | if (fmt[i] == 'e') |
---|
550 | stupid_mark_refs (XEXP (x, i), insn); |
---|
551 | if (fmt[i] == 'E') |
---|
552 | { |
---|
553 | register int j; |
---|
554 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) |
---|
555 | stupid_mark_refs (XVECEXP (x, i, j), insn); |
---|
556 | } |
---|
557 | } |
---|
558 | } |
---|